參數(shù)資料
型號： MPC8280CVVUPEX
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 450 MHz, RISC PROCESSOR, PBGA480
封裝： 37.50 X 37.50 MM, 1.55 MM HEIGHT, 1.27 MM PITCH, LEAD FREE, TBGA-480
文件頁數(shù)： 19/80頁
文件大?。?/td> 536K
代理商： MPC8280CVVUPEX
MPC8280 PowerQUICC II Family Hardware Specifications, Rev. 1.8
26
Freescale Semiconductor
Clock Configuration Modes
0111_001
Reserved
0111_010
Reserved
0111_011
50.0
133.3
3
150.0
400.0
3
150.0
400.0
0111_100
42.9
133.3
3
128.6
400.0
3.5
150.0
466.7
0111_101
37.5
133.3
3
112.5
400.0
4
150.0
533.3
0111_110
33.3
133.3
3
100.0
400.0
4.5
150.0
600.0
0111_111
Reserved
1000_000
Reserved
1000_001
Reserved
1000_010
42.9
114.3
3.5
150.0
400.0
3.5
150.0
400.0
1000_011
37.5
114.3
3.5
131.3
400.0
4
150.0
457.1
1000_100
33.3
114.3
3.5
116.7
400.0
4.5
150.0
514.3
1000_101
30.0
114.3
3.5
105.0
400.0
5
150.0
571.4
1000_110
28.6
114.3
3.5
100.0
400.0
5.5
150.0
628.6
1100_000
Reserved
1100_001
Reserved
1100_010
Reserved
1101_000
Reserved
1
The “l(fā)ow” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry
guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only.
Users must select a mode and input bus frequency so that the resulting configuration does not violate the frequency rating of
the user’s device. The minimum CPM frequency is 120 MHz. Minimum CPU frequency is determined by the clock mode. For
modes with a CPU multiplication factor <= 3, the minimum CPU frequency is 150 MHz for commercial temperature devices
and 175 MHz for extended temperature devices. For modes with a CPU multiplication factor >= 3.5: for Rev0.1 the minimum
CPU frequency is 250 MHz; for RevA or later the minimum CPU frequency is 150 MHz for commercial temperature devices
and 175 MHz for extended temperature devices.
2
MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins.
3
60x and local bus frequency. Identical to CLKIN.
4
CPM multiplication factor = CPM clock/bus clock
5
CPU multiplication factor = Core PLL multiplication factor
Table 16. Clock Configurations for Local Bus Mode 1 (continued)
Mode 2
Bus Clock 3
(MHz)
CPM
Multiplication
Factor 4
CPM Clock
(MHz)
CPU
Multiplication
Factor 5
CPU Clock
(MHz)
MODCK_H-MODCK[1:3]
Low
High
Low
High
Low
High
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