System Interface Unit (SIU)
Memory controller, including two dedicated SDRAM machines
r
PCI up to 66 MHz
r
Hardware bus monitor and software watchdog timer
r
IEEE 1149.1 JTAG test access port
r
q
High-Performance CPM with operating frequency up to 133, 166, or 200 MHz
G2 core and CPM may run at different frequencies
r
Parallel I/0 registers
r
On-board 32 KBytes of dual-port RAM
r
Two multi-channel controllers (MCCs), each supporting 128 full-duplex, 64 Kbps,
HDLC lines
r
Virtual DMA functionality
r
Three FCCs supporting:
r
Up to 155 Mbps ATM SAR (maximum of two) (AAL0, AAL1, AAL2,AAL5)
r
10/100 Mbps Ethernet (up to three) (IEEE 802.3X with Flow Control)
r
45 Mbps HDLC / Transparent (up to three)
r
Two UTOPIA Level II master/slave ports with multi-PHY support.
r
Three MII interfaces
r
Eight TDM interfaces (T1/E1), two TDM ports can be interfaced with T3/E3
r
Transmission Convergence Layer capabilities
r
Integrated Inverse Multiplexing for ATM (IMA) functionality
r
q
Two bus architectures: one 64-bit 60x bus and one 32-bit PCI or local bus
Integrated PCI interface
r
q
1.8V or 2.0V internal and 3.3V I/O
q
300 MHz power consumption: 2.5 W
q
480 TBGA package (37.5 x 37.5 mm)
q
Integrated PCI capability
q
MPC8260 Derivatives
8250
8255
8260
8264
8265
8266
Serial Communications
Controllers (SCCs)
4
Fast Communication Controllers
(FCCs)
3
2
3
MPC8265 Product Summary Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8265&nodeId=018rH3bTdG8657 (3 of 25) [8/23/2004 3:18:35 PM]