參數(shù)資料
型號(hào)： MPC8247CVRE
廠商： Motorola, Inc.
英文描述： MPC8272 PowerQUICC II Family Hardware Specifications
中文描述： MPC8272的PowerQUICC II系列硬件規(guī)格
文件頁(yè)數(shù)： 14/56頁(yè)
文件大?。?/td> 539K
代理商： MPC8247CVRE
14
MPC8272 PowerQUICC II Family Hardware Specifications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Power Dissipation
5
Power Dissipation
Table 7 provides preliminary, estimated power dissipation for various configurations. Note that suitable
thermal management is required to ensure the junction temperature does not exceed the maximum specified
value. Also note that the I/O power should be included when determining whether to use a heat sink. For a
complete list of possible clock configurations, refer to Section 7, “Clock Configuration Modes.”
Table 7. Estimated Power Dissipation for Various Configurations
1
6
AC Electrical Characteristics
The following sections include illustrations and tables of clock diagrams, signals, and CPM outputs and
inputs for 66.67-/83.33-/100-MHz MPC8272 devices. Note that AC timings are based on a 50-p
f
load.
Typical output buffer impedances are shown in Table 8.
Table 8. Output Buffer Impedances
1
6.1
CPM AC Characteristics
Table 9 lists CPM output characteristics.
1
Test temperature = 105
C)
2
P
INT
= I
DD
x V
DD
Watts
3
Values do not include I/O. Add the following estimates for active I/O based on the following bus speeds:
66.7 MHz = 0.35 W (nominal), 0.4 W (maximum)
83.3 MHz = 0.4 W (nominal), 0.5 W (maximum)
100 MHz = 0.5 W (nominal), 0.6 W (maximum)
Bus
(MHz)
CPM
Multiplication
Factor
CPM
(MHz)
CPU
Multiplication
Factor
CPU
(MHz)
P
INT
(W)
2, 3
Vddl 1.5 Volts
Nominal
Maximum
66.67
3
200
4
266
0.75
0.8
100
2
200
3
300
0.85
0.9
100
2
200
4
400
1
1.05
1
These are typical values at 65 C. Impedance may vary by ±25% with process and temperature.
Output Buffers
Typical Impedance (
)
60x bus
45
Memory controller
45
Parallel I/O
45
PCI
25
F
Freescale Semiconductor, Inc.
n
.
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