參數(shù)資料
型號(hào): MPC7410VS400NE
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 14/56頁(yè)
文件大?。?/td> 0K
描述: IC MPU 32BIT 400MHZ 360-FCCLGA
標(biāo)準(zhǔn)包裝: 44
系列: MPC74xx
處理器類型: 32-位 MPC74xx PowerPC
速度: 400MHz
電壓: 1.5V
安裝類型: 表面貼裝
封裝/外殼: 360-CLGA,F(xiàn)CCLGA
供應(yīng)商設(shè)備封裝: 360-FCCLGA(25x25)
包裝: 托盤
MPC7410 RISC Microprocessor Hardware Specifications, Rev. 6.1
Freescale Semiconductor
21
Electrical and Thermal Characteristics
Figure 8 shows the L2 bus input timing diagrams for the MPC7410.
Figure 8. L2 Bus Input Timing Diagrams
Figure 9 shows the L2 bus output timing diagrams for the MPC7410.
Figure 9. L2 Bus Output Timing Diagrams
Figure 10 provides the AC test load for L2 interface of the MPC7410.
Figure 10. AC Test Load for the L2 Interface
4.2.5
IEEE 1149.1 AC Timing Specifications
Table 11 provides the IEEE 1149.1 (JTAG) AC timing specifications as defined in Figure 12 through Figure 15.
Table 11. JTAG AC Timing Specifications (Independent of SYSCLK) 1
At recommended operating conditions (see Table 3)
Parameter
Symbol
Min
Max
Unit
Notes
TCK frequency of operation
fTCLK
0
33.3
MHz
TCK cycle time
t TCLK
30
ns
TCK clock pulse width measured at OVDD/2
tJHJL
15
ns
TCK rise and fall times
tJR and tJF
02
ns
L2SYNC_IN
VM
VM = Midpoint Voltage (L2OVDD/2)
tDVL2CH
tDXL2CH
tL2CR
tL2CF
L2 Data and
Inputs
Data Parity
L2SYNC_IN
All Outputs
VM
VM = Midpoint Voltage (L2OVDD/2)
tL2CHOV
tL2CHOX
VM
L2DATA Bus
tL2CHOZ
Output
Z0 = 50 Ω
L2OVDD/2
RL = 50 Ω
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