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參數(shù)資料
| 型號： | MPC564MZP56 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options |
| 中文描述： | 32-BIT, FLASH, 56 MHz, RISC MICROCONTROLLER, PBGA388 |
| 封裝： | 27 X 27 MM, 1 MM PITCH, PLASTIC, MO-151, BGA-388 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 163K |
| 代理商： | MPC564MZP56 |
MPC561/MPC563
PRODUCT BRIEF
MOTOROLA
3
General-Purpose I/O Support
24 Address pins and 32 data pins
can be used for general-purpose I/O in single-chip mode
16 GPIO in MIOS14
Many peripheral pins can be used as GPIO when not used as primary functions
2.6-V outputs on external bus pins
5-V outputs with slew rate control
NEXUS Debug Port (Class 3)
Compliant with Class 3 of the IEEE-ISTO Nexus 5001-1999
Program trace via branch trace messaging (BTM)
Data trace via data write messaging (DWM) and data read messaging (DRM)
Ownership trace via ownership trace messaging (OTM)
Run-time access to on-chip memory map and MPC5xx special purpose registers (SPRs) via the
READI read/write access protocol
Watchpoint messaging via the auxiliary port
Reduced-port mode (1 MDI, 2 MDO) or full-port mode (2 MDI. 8 MDO)
All features configurable and controllable via the auxiliary port
Security features for production environment
Supports the RCPU debug mode via the auxiliary port
READI module can be reset independent of system reset
Integrated I/O System
Two Time Processor Units (TPU3)
True 5-V I/O
Two time processing units (TPU3) with16 channels each
Each TPU3 is a micro-coded timer subsystem
Eight-Kbytes of dual port TPU RAM (DPTRAM) shared by two TPU3 modules for TPU micro-code
22-Channel Modular I/O System (MIOS14)
Six modulus counter sub-modules (MCSM)
10 double-action sub-modules (DASM)
12 dedicated PWM sub-modules (PWMSM)
One MIOS14 16-bit parallel port I/O sub-modules (MPIOSM)
Two Enhanced Queued Analog-to-Digital Converter Modules (QADC64E)
Two queued analog-to-digital converter modules (QADC64_A, QADC64_B) providing a total of 32
analog channels
16 analog input channels on each QADC64E module using internal multiplexing
Directly supports up to four external multiplexers
Up to 41 total input channels on the two QADC64E modules with external multiplexing
Software configurable to operate in Enhanced or Legacy (MPC555 compatible) mode
Unused analog channels can be used as digital input/output pins
— GPIO on all channels in Enhanced mode
10-bit A/D converter with internal sample/hold
Typical conversion time of less than 5 μs (>200 K samples/second)
Two conversion command queues of variable length
Automated queue modes initiated by:
— External edge trigger
— Software command
— Periodic/interval timer within QADC64E module, that can be assigned to both queue 1 and 2
— External Gated trigger (queue 1only)
64 result registers
— Output data is right- or left-justified, signed or unsigned
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| MPC561CZP56 | RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options |
| MPC562CZP56 | RISC MCU Including Peripheral Pin Multiplexing with Flash and Code Compression Options |
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