
G-50
MPC561/MPC563 Reference Manual
MOTOROLA
QADC64E Electrical Characteristics
G.15 QADC64E Electrical Characteristics
Table G-16. QADC64E Conversion Characteristics
Note: (VDD = 2.6 V ± 0.1 V, VDDH = 5.0 V ± 0.25 V, TA = TL to TH)
Num
Parameter
Symbol
Min
Max
Units
97
QADC Clock (QCLK) Frequency 1
1 Conversion characteristics vary with F
QCLK rate. Reduced conversion accuracy occurs at max FQCLK rate.
FQCLK
0.5
3.0
MHz
98
Conversion Cycles 2
Legacy mode: QADCMCR[FLIP] = 0
Enhanced mode: QADCMCR[FLIP] = 1
2 The number of conversion cycles is dependent on the IST bit in the CCW register.
CC
12
14
28
20
QCLK cycles
99
Conversion Time
FQCLK = 2.0 MHz
Legacy mode: QADCMCR[FLIP] = 0
Min = CCW[IST] =0b00, CCW[BYP] = 0
Max = CCW[IST] =0b11, CCW[BYP] = 1
Enhanced mode: QADCMCR[FLIP] = 1
Min = CCW[IST] =0b0
Max = CCW[IST] =0b1
TCONV
6.0
7.0
14
10
s
100
Stop Mode Recovery Time
TSR
—10
s
101
Resolution 3
3 At V
RH – VRL = 5.12 V, one count = 5 mV.
—5
—
mV
102
Absolute (total unadjusted) error 4, 5, 6, 7
FQCLK = 2.0MHz
3, 2 clock input sample time
4 Accuracy tested and guaranteed at V
RH – VRL = 5.0 V ± 0.25 V
5 This parameter is periodically sampled rather than 100% tested.
6 Absolute error includes 1/2 count (~2.5 mV) of inherent quantization error and circuit (differential, integral, and
offset) error. Specification assumes that adequate low-pass filtering is present on analog input pins — capacitive filter
with 0.01
F to 0.1 F capacitor between analog input and analog ground, typical source isolation
impedance of 10 K
.
7 Input signals with large slew rates or high frequency noise components cannot be converted accurately. These signals
may affect the conversion accuracy of other channels.
AE
-2
2
Counts
102a
Absolute (total unadjusted) error 8, 9, 10, 11
FQCLK = 2.0MHz
3, 2 clock input sample time
AEALT
-7.8
3.5
mV
104
DC Disruptive Input Injection Current 12, 13, 14, 15, 16
IINJ
17
IINJ
18
-3 19
-1
3
1
m
Α
mA
105
Current Coupling Ratio 20
PQA
PQB
K—
—
8x10 -5
106
Incremental error due to injection current
All channels have same 10K
< Rs <100k
Channel under test has Rs=10K
, IINJ=+3mA
EINJ
+1.0
Counts
107
Source impedance at input 21
RS
—100
K
107a
Incremental capacitance during Sampling 22
C
SAMP
—5
pF