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| 型號： | MPC5606SVMG6R |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PBGA208 |
| 封裝： | 17 X 17 MM, 1 MM PITCH, MAPBGA-208 |
| 文件頁數(shù)： | 38/134頁 |
| 文件大小： | 890K |
| 代理商： | MPC5606SVMG6R |
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MPC560xS Microcontroller Data Sheet, Rev. 5
Preliminary—Subject to Change Without Notice
Revision history
Freescale Semiconductor
132
5
(continued)
1 Sep 2010
(continued)
Added the “SMC pad delays” table.
Added the “SSD specifications” section.
In the “I/O consumption” table, added a specification for IDDMxAVG.
Revised the “Fast external crystal oscillator (4–16 MHz) electrical characteristics” table.
In the “Slow external crystal oscillator (32 kHz) electrical characteristics” figure,
changed VOSC32K_XTAL to VSXOSC_XTAL.
In footnote 2 of the “FMPLL electrical characteristics” table, changed “fCPU 64 MHz can
be achieved only at up to 105 °C” to “fCPU 64 MHz can be achieved only at
temperatures up to 105 °C with a maximum FM depth of 2%”.
In the first “Crystal oscillator and resonator connection scheme” figure:
Swapped “XTAL” and “EXTAL”.
Deleted RP.
In the second “Crystal oscillator and resonator connection scheme” figure, deleted RF.
Added the “Crystal description” table.
In the “Fast internal RC oscillator (16 MHz) electrical characteristics” table:
Changed the conditions for
FIRCVAR (was “TA = -25 °C”, is “TA = -40to105°C,
trimmed”), removed the associated footnote, and changed the associated guarantee
method (was P, is C).
Changed the max specification for IFIRCPWD (was 10 A, is 1 A).
Added the “Resonator description” table.
In the “Fast external crystal oscillator (4 to 16 MHz) electrical characteristics” table,
changed footnote 1 (was “... to 125
C”, is “... to 105 C”).
In the “Slow external crystal oscillator” section, changed “32 kHz” to “32 KHz”.
In the “Slow external crystal oscillator (32 KHz) electrical characteristics” table, added
a footnote to the start-up timing specification.
In the “Slow internal RC oscillator (128 KHz) electrical characteristics” table:
Changed the condition for
SIRCVAR (was —, is “Trimmed”) and the associated
guarantee method (was P, is C).
Changed the guarantee method for fSIRC (was P, is C).
Revised the “Program and erase specifications” table.
In the “Flash memory read access timing” table, changed footnote 1 (was “... to 125
C”,
is “... to 105
C”).
Revised the “Flash module life” table.
Added flash read access timing characteristics.
In the “ADC conversion characteristics” table:
Deleted the entry for TUEp (precision channels are not implemented on this device).
Changed the specification for INL (was min = -1.5 LSB and max = 1.5 LSB, is
min = max = 2.5 LSB).
Revised the entry for IINJ (was ±10 mA, is ±5 mA).
Changed the max specifications for RSW1 (was 3 k, is 1 k) and for RSW2 (was 2
k
, is 1 k).
Added the “LCD driver electrical characteristics” section.
Revised the table titles in the “Pad AC specifications” section.
Added the “QuadSPI timing” section.
Revised the “JTAG interface timing” table.
Revised the “Nexus debug port timing” table.
Renamed the “Interface to TFT LCD panels—access level” section (is “Interface to TFT
LCD panels”) and revised the table (title and contents) within it.
In the “DSPI timing” table, added a min specification for tCSC (is 20 ns).
In the DSPI section, added a note (referring to the “DSPI timing” table) to each timing
diagram.
Revised the “Ordering information” section.
Table 66. Document revision history
Revision
Date
Substantive changes
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC5606S
products
in
208
MAPBGA
packages
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