- 您現在的位置：買賣IC網 > PDF目錄45341 > MPC5604PEF0MLQ6 (FREESCALE SEMICONDUCTOR INC) 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP144 PDF資料下載
參數資料
| 型號： | MPC5604PEF0MLQ6 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-144 |
| 文件頁數： | 53/99頁 |
| 文件大?。?/td> | 1130K |
| 代理商： | MPC5604PEF0MLQ6 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁當前第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁
MPC5604P Microcontroller Data Sheet, Rev. 7
Freescale Semiconductor
57
3.10.4
Input DC electrical characteristics definition
Figure 13 shows the DC electrical characteristics behavior as function of time.
Table 22. Supply current (3.3 V, NVUSRO[PAD3V5V] = 1)
Symbol
C
Parameter
Conditions
Value
Unit
Typ
Max
IDD_LV_CORx T
Sup
p
ly
current
RUN—Maximum mode1
1 Maximum mode: FlexPWM, ADCs, CTU, DSPI, LINFlex, FlexCAN, 15 output pins, 1st and 2nd PLL enabled. I/O
supply current excluded.
VDD_LV_CORx
externally forced at 1.3 V
40 MHz
62
77
mA
64 MHz
71
89
RUN—Typical mode2
2 Typical mode: DSPI, LINFlex, FlexCAN, 15 output pins, 1st PLL only. I/O supply current excluded.
40 MHz
45
56
64 MHz
53
66
P
RUN—Maximum mode3
3 Code fetched from RAM, PLL_0: 64 MHz system clock (x4 multiplier with 16 MHz XTAL), PLL_1 is ON at
PHI_div2 = 120 MHz and PHI_div3 = 80 MHz, auxiliary clock sources set that all peripherals receive maximum
frequency, all peripherals enabled.
VDD_LV_CORx
externally forced at 1.3 V
64 MHz
60
75
HALT mode4
4 Halt mode configurations: code fetched from RAM, code and data flash memories in low power mode,
OSC/PLL_0/PLL_1 are OFF, core clock frozen, all peripherals are disabled.
VDD_LV_CORx
externally forced at 1.3 V
—1.5
10
STOP mode5
5 STOP “P” mode Device Under Test (DUT) configuration: code fetched from RAM, code and data flash memories
OFF, OSC/PLL_0/PLL_1 are OFF, core clock frozen, all peripherals are disabled.
VDD_LV_CORx
externally forced at 1.3 V
—1
10
IDD_FLASH
T
Flash during read on single mode
VDD_HV_FL at 3.3 V
—
8
10
Flash during erase operation on
single mode
VDD_HV_FL at 3.3 V
—
10
12
IDD_ADC
T
ADC—Maximum mode1
VDD_HV_ADC0 at 3.3 V
VDD_HV_ADC1 at 3.3 V
fADC =16MHz
ADC_1
2.5
4
ADC_0
2
4
ADC—Typical mode2
ADC_1
0.8
1
ADC_0 0.005 0.006
IDD_OSC
T
Oscillator
VDD_OSC at 3.3V
8MHz
2.4
3
發(fā)布緊急采購，3分鐘左右您將得到回復。