參數(shù)資料
型號： MPC5602PEF0MLH6R
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM, 0.50 MM PITCH, ROHS COMPLIANT, MS-026BCD, LQFP-64
文件頁數(shù)： 2/95頁
文件大?。?/td> 1694K
代理商： MPC5602PEF0MLH6R
MPC5602P Microcontroller Data Sheet, Rev. 4.1
Freescale Semiconductor
10
lower priority ISRs do not delay the execution of higher priority ISRs. To allow the appropriate priorities for each source of
interrupt request, the priority of each interrupt request is software configurable.
When multiple tasks share a resource, coherent accesses to that resource need to be supported. The INTC supports the priority
ceiling protocol (PCP) for coherent accesses. By providing a modifiable priority mask, the priority can be raised temporarily so
that all tasks which share the same resource can not preempt each other.
The INTC provides the following features:
Unique 9-bit vector for each separate interrupt source
8 software triggerable interrupt sources
16 priority levels with fixed hardware arbitration within priority levels for each interrupt source
Ability to modify the ISR or task priority: modifying the priority can be used to implement the priority ceiling protocol
for accessing shared resources.
1 external high priority interrupt (NMI) directly accessing the main core and I/O processor (IOP) critical interrupt
mechanism
1.5.7
System status and configuration module (SSCM)
The system status and configuration module (SSCM) provides central device functionality.
The SSCM includes these features:
System configuration and status
— Memory sizes/status
— Device mode and security status
— Determine boot vector
— Search code flash for bootable sector
— DMA status
Debug status port enable and selection
Bus and peripheral abort enable/disable
1.5.8
System clocks and clock generation
The following list summarizes the system clock and clock generation on the MPC5602P:
Lock detect circuitry continuously monitors lock status
Loss of clock (LOC) detection for PLL outputs
Programmable output clock divider (
1, 2, 4, 8)
FlexPWM module and eTimer module running at the same frequency as the e200z0h core
Internal 16 MHz RC oscillator for rapid start-up and safe mode: supports frequency trimming by user application
1.5.9
Frequency-modulated phase-locked loop (FMPLL)
The FMPLL allows the user to generate high speed system clocks from a 4–40 MHz input clock. Further, the FMPLL supports
programmable frequency modulation of the system clock. The PLL multiplication factor, output clock divider ratio are all
software configurable.
The FMPLL has the following major features:
Input clock frequency: 4–40 MHz
Maximum output frequency: 64 MHz
Voltage controlled oscillator (VCO)—frequency 256–512 MHz
Reduced frequency divider (RFD) for reduced frequency operation without forcing the FMPLL to relock
相關(guān)PDF資料
PDF描述
MPC5602PEF0MLL6R 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100
MPC5601F0MLH6R 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP64
MPC5601F0VLL6 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100
MPC5601F0MLH6 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP64
MPC5602F0MLL4R 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC5602PEF0MLL4R 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5602P Microcontroller Data Sheet
MPC5602PEF0MLL6R 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5602P Microcontroller Data Sheet
MPC5602PEF0VLH4R 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5602P Microcontroller Data Sheet
MPC5602PEF0VLH6R 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5602P Microcontroller Data Sheet
MPC5602PEF0VLL4R 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MPC5602P Microcontroller Data Sheet
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