參數(shù)資料
型號(hào)： MPC5602F0VLL6R
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.40 MM, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-100
文件頁數(shù)： 16/95頁
文件大小： 1694K
代理商： MPC5602F0VLL6R
MPC5602P Microcontroller Data Sheet, Rev. 4.1
Freescale Semiconductor
23
2.2.2
System pins
Table 4 and Table 5 contain information on pin functions for the MPC5602P devices. The pins listed in Table 4 are
single-function pins. The pins shown in Table 5 are multi-function pins, programmable via their respective pad configuration
register (PCR) values.
2.2.3
Pin multiplexing
Table 5 defines the pin list and muxing for the MPC5602P devices.
Each row of Table 5 shows all the possible ways of configuring each pin, via alternate functions. The default function assigned
to each pin after reset is the ALT0 function.
MPC5602P devices provide three main I/O pad types, depending on the associated functions:
Slow pads are the most common, providing a compromise between transition time and low electromagnetic emission.
Medium pads provide fast enough transition for serial communication channels with controlled current to reduce
electromagnetic emission.
Fast pads provide maximum speed. They are used for improved NEXUS debugging capability.
Medium and Fast pads can use slow configuration to reduce electromagnetic emission, at the cost of reducing AC performance.
For more information, see “Pad AC Specifications” in the device data sheet.
Table 4. System pins
Symbol
Description
Direction
Pad speed1
1 SRC values refer to the value assigned to the Slew Rate Control bits of the pad configuration register.
Pin
SRC = 0 SRC = 1 64-pin 100-pin
Dedicated pins
NMI
Non-maskable Interrupt
Input only
Slow
—
1
XTAL
Analog output of the oscillator amplifier
circuit—needs to be grounded if oscillator is
used in bypass mode
——
—
11
18
EXTAL
Analog input of the oscillator amplifier circuit,
when the oscillator is not in bypass mode
Analog input for the clock generator when the
oscillator is in bypass mode
——
—
12
19
TDI
JTAG test data input
Input only
Slow
—
35
58
TMS
JTAG state machine control
Input only
Slow
—
36
59
TCK
JTAG clock
Input only
Slow
—
37
60
TDO
JTAG test data output
Output only
Slow
Fast
38
61
Reset pin
RESET
Bidirectional reset with Schmitt trigger
characteristics and noise filter
Bidirectional Medium
—
13
20
Test pin
VPP_TEST Pin for testing purpose only. To be tied to ground
in normal operating mode.
——
—
47
74
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