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參數(shù)資料
| 型號(hào)： | MPC5602DF1CLL4R |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 48 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-100 |
| 文件頁(yè)數(shù)： | 25/83頁(yè) |
| 文件大?。?/td> | 1473K |
| 代理商： | MPC5602DF1CLL4R |
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Electrical characteristics
MPC5602D Microcontroller Data Sheet, Rev. 4
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
31
4.7.4
Output pin transition times
4.7.5
I/O pad current specification
The I/O pads are distributed across the I/O supply segment. Each I/O supply segment is associated to a VDD/VSS supply pair as
described in Table 19.
Table 20 provides I/O consumption figures.
In order to ensure device reliability, the average current of the I/O on a single segment should remain below the IAVGSEG
maximum value.
Table 18. Output pin transition times
Symbol C
Parameter
Conditions1
1 V
DD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified
Value2
2 All values need to be confirmed during device validation.
Unit
Min Typ Max
ttr CC D Output transition time output pin
3
SLOW configuration
3 C
L includes device and package capacitances (CPKG < 5 pF).
CL = 25 pF VDD = 5.0 V ± 10%, PAD3V5V = 0 —
—
50
ns
TCL = 50 pF
—
100
DCL = 100 pF
—
125
DCL = 25 pF VDD = 3.3 V ± 10%, PAD3V5V = 1 —
—
50
TCL = 50 pF
—
100
DCL = 100 pF
—
125
ttr CC D Output transition time output
MEDIUM configuration
CL = 25 pF VDD = 5.0 V ± 10%, PAD3V5V = 0
SIUL.PCRx.SRC = 1
—
10
ns
TCL = 50 pF
—
20
DCL = 100 pF
—
40
DCL = 25 pF VDD = 3.3 V ± 10%, PAD3V5V = 1
SIUL.PCRx.SRC = 1
——
12
TCL = 50 pF
—
25
DCL = 100 pF
—
40
Table 19. I/O supply segment
Package
Supply segment
12
34
100 LQFP
pin 16 – pin 35
pin 37 – pin 69
pin 70 – pin 83
pin 84 – pin 15
64 LQFP
pin 8 – pin 26
pin 28 – pin 55
pin 56 – pin 7
—
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