參數(shù)資料
型號(hào): MPC5566MZP132
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 132 MHz, MICROCONTROLLER, PBGA416
封裝: 27 X 27 MM, 1 MM PITCH, PLASTIC, MS-034AAL-1, BGA-416
文件頁(yè)數(shù): 8/66頁(yè)
文件大?。?/td> 1351K
代理商: MPC5566MZP132
MPC5566 Microcontroller Data Sheet, Rev. 2.0
Electrical Characteristics
Freescale Semiconductor
16
40
VREF differential voltage
VRH – VRL
4.5
5.25
V
41
VSSSYN to VSS differential voltage
VSSSYN – VSS
–50
50
mV
42
VRCVSS to VSS differential voltage
VRCVSS – VSS
–50
50
mV
43
VDDF to VDD differential voltage
VDDF – VDD
–100
100
mV
43a VRC33 to VDDSYN differential voltage
VRC33 – VDDSYN
–0.1
0.1 19
V
44
Analog input differential signal range (with common mode 2.5 V)
VIDIFF
–2.5
2.5
V
45
Operating temperature range, ambient (packaged)
TA = (TL to TH)TL
TH
οC
46
Slew rate on power-supply pins
50
V/ms
1 V
DDE2 and VDDE3 are limited to 2.25–3.6 V only if EBTS = 0; VDDE2 and VDDE3 have a range of 1.6–3.6 V if EBTS = 1.
2 | V
DDA0 – VDDA1 | must be < 0.1 V.
3 V
PP can drop to 3.0 V during read operations.
4 If standby operation is not required, connect V
STBY to ground.
5 Applies to CLKOUT, external bus pins, and Nexus pins.
6 Maximum average RMS DC current.
7 Eight-way cache enabled (L1CSR0[CORG] = 0b0).
8 Average current measured on automotive benchmark.
9 Peak currents can be higher on specialized code.
10 High use current measured while running optimized SPE assembly code with all code and data 100% locked in cache
(0% miss rate) with all channels of the eMIOS and eTPU running autonomously, plus the eDMA transferring data continuously from
SRAM to SRAM. Higher currents are possible if an ‘idle’ loop that crosses cache lines is run from cache. Write code to avoid this
condition.
11 Four-way cache enabled (L1CSR0[CORG] = 0b1) or (L1CSR0[CORG] = 0b0 with L1CSR0[WAM] = 0b1, L1CSR0[WID] = 0b1111,
L1CSR0[WDD] = 0b1111, L1CSR0[AWID] = 0b1, and L1CSR0[AWDD] = 0b1).
12 Figure 3 shows an illustration of the I
DD_STBY values interpolated for these temperature values.
13 Power requirements for the V
DD33 supply depend on the frequency of operation, load of all I/O pins, and the voltages on the I/O
segments. Refer to Table 11 for values to calculate the power dissipation for a specific operation.
14 Power requirements for each I/O segment are dependent on the frequency of operation and load of the I/O pins on a particular I/O
segment, and the voltage of the I/O segment. Refer to Table 10 for values to calculate power dissipation for specific operation. The
total power consumption of an I/O segment is the sum of the individual power consumptions for each pin on the segment.
15 Absolute value of current, measured at V
IL and VIH.
16 Weak pullup/down inactive. Measured at V
DDE = 3.6 V and VDDEH = 5.25 V. Applies to pad types: pad_fc, pad_sh, and pad_mh.
17 Maximum leakage occurs at maximum operating temperature. Leakage current decreases by approximately one-half for each 8 oC
to 12 oC, in the ambient temperature range of 50 oC to 125 oC. Applies to pad types: pad_a and pad_ae.
18 V
SSA refers to both VSSA0 and VSSA1. | VSSA0 – VSSA1 | must be < 0.1 V.
19 Up to 0.6 V during power up and power down.
Table 9. DC Electrical Specifications (TA = TL – TH) (continued)
Spec
Characteristic
Symbol
Min
Max
Unit
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC551x
and
MPC5533
products
in
208
MAPBGA
packages;
MPC5534
and
MPC5553
products
in
208
and
496
MAPBGA
packages;
MPC5554,
MPC5565,
MPC5566
and
MPC5567
products
in
496
MAPBGA
packages
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