參數(shù)資料
型號: MPC5200CBV266BR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 266 MHz, MICROPROCESSOR, PBGA272
封裝: 27 X 27 MM, 1.27 MM PITCH, HALIDE FREE, PLASTIC, BGA-272
文件頁數(shù): 70/80頁
文件大?。?/td> 788K
代理商: MPC5200CBV266BR2
MPC5200B Data Sheet, Rev. 0.6
System Design Information
Freescale Semiconductor
72
Figure 53. PORRESET vs. JTAG_TRST
5.4.1.2
Connecting JTAG_TRST
The wiring of the JTAG_TRST depends on the existence of a board-related debug interface. (see below)
Normally this interface is implemented, using a COP (common on-chip processor) connector. The COP
allows a remote computer system (typically, a PC with dedicated hardware and debugging software) to
access and control the internal operations of the MPC5200B.
5.4.2
e300 COP/BDM Interface
There are two possibilities to connect the JTAG interface: using it with a COP connector and without a
COP connector.
5.4.2.1
Boards Interfacing the JTAG Port via a COP Connector
The MPC5200B functional pin interface and internal logic provides access to the embedded e300
processor core through the Freescale (formerly Motorola) standard COP/BDM interface. Table 53 gives
the COP/BDM interface signals. The pin order shown reflects only the COP/BDM connector order.
Table 53. COP/BDM Interface Signals
BDM
Pin #
MPC5200B
I/O Pin
BDM
Connector
Internal
Pull Up/Down
External
Pull Up/Down
I/O(1)
16
GND
15
TEST_SEL_0
ckstp_out
I
14
KEY
13
HRESET
hreset
10k Pull-Up
O
12
GND
11
SRESET
sreset
10k Pull-Up
O
10
N/C
9
JTAG_TMS
tms
100k Pull-Up
10k Pull-Up
O
8—
N/C
JTAG_TRST
PORRESET
required assertion of JTAG_TRST
optional assertion of JTAG_TRST
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MPC5200CBV400B 制造商:Freescale Semiconductor 功能描述:
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