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參數(shù)資料
| 型號： | MPC2005 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms |
| 中文描述： | 256KB和512KB的二級緩存模塊BurstRAM為PowerPC制備/ CH旺平臺 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 84K |
| 代理商： | MPC2005 |
MPC2004
MPC2005
6–1
Motorola, Inc. 1995
Advance Information
256KB and 512KB BurstRAM
Secondary Cache Modules for
PowerPC
PReP/CHRP Platforms
The MPC2004 and MPC2005 are designed to provide burstable, high perfor-
mance 256KB/512KB L2 cache for the PowerPC 60x microprocessor family in
conformance with the PowerPC Reference Platform (PReP) and the PowerPC
Common Hardware Reference Platform (CHRP) specifications. The modules
are configured as 32K x 72 and 64K x 72 bits in a 182 (91 x 2) pin DIMM format.
Each module uses four of Motorola’s 5 V 32K x 18 or 64K x 18 BurstRAMs and
a 5 V cache tag RAM configured as 16K x 12 for tag field plus 16K x 2 for valid and
dirty status bits.
Bursts can be initiated with the SRAMADS signal. Subsequent burst address-
es are generated internal to the BurstRAM by the SRAMCNTEN signal.
Write cycles are internally self timed and are initiated by the rising edge of the
clock (CLKx) inputs. Eight write enables are provided for byte write control.
Presence detect pins are available for auto configuration of the cache control.
A serial EEPROM is optional to provide more in–depth description of the
cache module.
The module family pinout will support 5 V and 3.3 V components for a clear path
to lower voltage and power savings. Both power supplies must be connected.
These cache modules are plug and pin compatible with the MPC2006, a 1MB
synchronous module also designed for the PReP and CHRP specifications.
They are also compatible with the MPC2007 and MPC2009, 256KB and 1MB re-
spectively, asynchronous cache modules.
PowerPC–style Burst Counter on Chip
Flow–Through Data I/O
Module Requires Both 3.3 V and 5 V Power Supplies
Multiple Clock Pins for Reduced Loading
All Cache Data and Tag I/Os are LVTTL (3.3 V) Compatible
Three State Outputs
Byte Write Capability
Fast Module Clock Rates: 66 MHz
Fast SRAM Access Times: 10 ns for Tag RAM Match
9 ns for Data RAM
Decoupling Capacitors for Each Fast Static RAM
High Quality Multi–Layer FR4 PWB With Separate Power and Ground Planes
182 Pin Card Edge Module
Burndy Connector, Part Number: ELF182JSC–3Z50
BurstRAM is a trademark of Motorola.BurstRAM is a trademark of Motorola.
PowerPC is a trademark of International Business Machines Corp.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
Order this document
by MPC2004/D
SEMICONDUCTOR TECHNICAL DATA
MPC2004
MPC2005
5/95
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