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參數(shù)資料
| 型號： | MPAA020 |
| 廠商： | Motorola, Inc. |
| 英文描述： | FIELD PROGRAMMABLE ANALOG ARRAY |
| 中文描述： | 現(xiàn)場可編程模擬陣列 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 76K |
| 代理商： | MPAA020 |
SEMICONDUCTOR TECHNICAL DATA
1
REV 0
Motorola, Inc. 1997
4/97
The MPAA020 is a field programmable analog array based on a
general purpose analog cell that may be configured, either alone or in
combinations, as any of a wide range of analog functions from simple
comparators to complex filters. These cells are arranged in a 4 x 5 array
with supporting circuitry to provide input/output signal buffering,
programmable reference voltages, cell to cell interconnections, etc. Each
cell’s function may be programmed to connect with any of the other cells
in the array. Unused cells are powered down individually to minimize power dissipation. Digital interface circuitry is provided to
write the analog circuit configuration data to on–chip SRAM in the same manner as Motorola’s digital FPGAs (serial & parallel
PROM, and microprocessor mode).
Analog circuit design is simplified with EasyAnalog
Design Software, which handles bit level circuit configuration details,
allowing the user to do analog design using functional macros in an easy to use point–and–click graphical environment.
Table 1: Hardware Features
Feature
Value
Number of Programmable Cells
20
Analog I/O Cells
13
Anti–aliasing/Smoothing Filtering
Sallen–Key External RC
Additional Auxiliary Opamps
8
Internal Voltage Reference
8–Bit Programmable
Internal Clock Dividers
4 Independent 5–Bit Dividers
Package
160–Pin QFP
This document contains information on a new product. Specifications and information herein are subject to
change without notice.
FIELD PROGRAMMABLE
ANALOG ARRAY
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