
MP3274
5
Rev. 4.00
ELECTRICAL CHARACTERISTICS TABLE (CONT’D)
Description
Symbol
Min
Typ
Max
Min
Max
Units
Conditions
DIGITAL OUTPUTS
(Data Format 2’s Complement)
DB0/SDC–DB11/SDO, STS, STL
C
OUT
=15 pF
Logical “1” Voltage
Logical “0” Voltage
Tristate Leakage
V
OH
V
OL
I
OZ
4.0
2.4
V
V
μ
A
I
SOURCE
= 0.5 mA
I
SINK
= 1.6 mA
V
OUT
=GND to V
DD
0.4
0.4
–5
5
–5
5
POWER SUPPLIES
Operating Range
V
DD
V
CC
V
EE
Operating Current
I
DD
I
CC
I
EE
Power Dissipation
+4.5
+11.4
–4.75
+5.5
+16.5
–16.5
+4.5
+11.4
–4.75
+5.5
+16.5
–16.5
V
V
V
Tested at –11.4 and –16.5 only
2
5
7
8
3
7
8
3
mA
mA
mA
mW
1.5
110
200
200
25
°
C
Tmin to Tmax
NOTES
1
Tester measures code transitions by dithering the voltage of the analog input (V
). The difference between the measured and the
ideal code width is the DNL error. The INL error is the maximum distance (in LSBs) from the best fit line to any transition voltage
Guaranteed. Not tested.
Specified values guarantee functionality. Refer to other parameters for accuracy.
Input bandwidth is a measure of performance of the A/D input stage (S/H + amplifier). Refer to other parameters for accuracy
within the specified bandwidth.
All channel input pins and ground reference pin have protection which becomes active above
All digital inputs have diodes to V
DD
and AGND. Input DC currents will not exceed specified limits for any input voltage between GND
and V
DD
.
2
3
4
5
6
60 V.
Specifications are subject to change without notice
ABSOLUTE MAXIMUM RATINGS
(T
A
= +25
°
C unless otherwise noted)
1, 2
V
CC
to DGND
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
EE
to DGND
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
DD
to DGND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AGND to DGND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputs/Outputs
to DGND
–0.5 V to V
LOGIC
+0.5 V
. . . . . . . . . . . . . . . . . . . . .
Analog Inputs (A
IN
0 – A
IN
31, GND REF)
to AGND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0 to +16.5 V
0 to –16.5 V
0 to +7 V
±
1 V
±
60 V
REF OUT
Indefinite short to DGND,
Momentary short to V
CC
. . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature
Package Power Dissipation Rating to 75
°
C
PGA, PLCC
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derates above 75
°
C
Lead Temperature, Soldering
Storage Temperature (Ceramic)
150
°
C
1800 mW
25 mW/
°
C
300
°
C, 10 Sec
–65
°
C to +150
°
C
. . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . .
. . . . . . . .
NOTES:
1
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
Any input pin which can see a value outside the absolute maximum ratings
should be protected by Schottky diode clamps
(HP5082-2835) from input pin to the supplies. All logic inputs have protection diodeswhich will protect the device from
short transients outside the supplies of less than 100mA for less than 100
μ
s.
2