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PIN DESCRIPTIONS AND FUNCTIONS
P
IN
O
UT
P
OSITIVE
I
NPUT AND
I
NPUT
C
OMMON
Steady state voltage range is 16 to 40 VDC. Transient range is 40
to 50 V for a maximum of 120 msec. Low voltage lockout prevents
the units from operating below approximately 15.5 VDC input
voltage to keep system current levels smooth, especially during
initialization or re-start operations. All models include a soft-start
function to prevent large current draw and minimize overshoot.
C
ASE AND
E
XTERNAL
I
NPUT
F
ILTERS
Internal 500 V capacitors are connected between the case and
input common and between the case and output common. See
Figure 1.
Interpoint’s FME filters are recommended to meet CE03 require-
ments for reflected input line current. When using an external
input filter it is important that the case of the filter and the case of
the converter be connected through as low as an impedance as
possible. Direct connection of the baseplates to chassis ground is
the best connection. If connected by a single trace, the trace
should be as wide as it is long.
T
RIM
Both single and dual output
models include a trim function.
Output voltage can be trimmed
from 60% up to 110% of nominal
V out . When trimming up, do not
exceed the maximum output
power. When trimming down, do
not exceed the maximum output
current.
On dual models the positive
output is regulated and the
negative output is transformer
coupled (cross-regulated) to the
positive output. When trimming
the duals, both output voltages
will be adjusted equally.
I
NHIBIT
1
AND
2
Two inhibit terminals disable switching, resulting in no output and
very low quiescent input current. The two inhibit pins allow access
to an inhibit function on either side of the isolation barrier to help
maintain isolation.
An open collector is
required for inter-
facing with both of
the
inhibit
Applying an open-
collector TTL logic
low to either inhibit
pin will inhibit the
converter. Applying
an open collector
TTL logic high or
leaving the pins
open will enable the converter. Inhibit 1 is referenced to Input
Common, while Inhibit 2 is referenced to Sense Return on the
output side.
pins.
The
voltage for Inhibit 1 is
13 V and for Inhibit 2 it
is 8 V. Float the inhibit
pin(s) if not used. The
required
voltage level is 0.2 V
maximum.
open
circuit
logic
low
Pin
Single Output
Dual Output
1
2
3
4
5
6
7
8
9
Positive Input
Input Common
Trim
Inhibit 1(INH1)
Sync Out
Sync In
Positive Output
Output Common
Sense Return
Positive Sense
Share
Inhibit 2 (INH2)
Positive Input
Input Common
Case
Inhibit 1(INH1)
Sync Out
Sync In
Positive Output
Output Common
Negative Output
Trim
Share
Inhibit 2 (INH2)
10
11
12
5
MOR SERIES
120 WATT
DC/DC C
ONVERTERS
20 k
200
10 k
V
CC
Positive
Input
Inhibit 1
Input
Common
MOR Input Side
12 V
F
IGURE
5: I
NHIBIT
– I
NPUT
S
IDE
V
S
~
10 k
200
Current
Limit
Feedback
Voltage
E/A
Inhibit 2
Sense
Return
MOR Output Side
F
IGURE
6: I
NHIBIT
– O
UTPUT
S
IDE
Positive Input
1
2 Input Common
MOR
Single or Dual
Output
10, 11, 12
7, 8, 9
Case*
Chassis Ground
Positive Input
1, 2, 3
4, 5, 6
28V
Input Common
FME28-461
EMI Filter
Positive Output
Output Common
F
IGURE
2: E
XTERNAL
ILTER
C
ONNECTION
3
Trim
R
T
7
10
9
8
Positive Output
Positive Sense
Sense Return
Output Common
MOR
Single
Output
TRIM UP
TRIM
DOWN
F
IGURE
3:T
RIM
– S
INGLE
10 Trim
R
T
TRIM UP
TRIM DOWN
MOR
Dual
Output
7
8
9
Positive Output
Output Common
Negative Output
F
IGURE
4:T
RIM
– D
UAL
Trim Down:
α
=V
,
0.6
≤
α ≤
1.0
o nominal
V
o
Example: V
o nominal
= 5.0
,
V
o
= 4.5
,
α
= 0.9
,
R
T
= 150 k
R
T
(k
) = 50
α
–
30
1
–
α
Trim Up:
α
= V
,
1.0
≤
α ≤
1.1
o nominal
R
T
(k
) =
(
–
1
)
20
V
o
Example: V
o nominal
= 5.0
,
V
o
= 5.25
,
α
= 1.05
,
R
T
= 390 k
(
α
-1)
2.5
o
–
50
Trim Formulas