參數(shù)資料
型號(hào)： MN103SF77R
廠商： PANASONIC CORP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 60 MHz, MICROCONTROLLER, PQFP128
封裝： 18 X 18 MM, LEAD FREE, PLASTIC, LQFP-128
文件頁(yè)數(shù)： 1/3頁(yè)
文件大?。?/td> 200K
代理商： MN103SF77R
MN103S77N
Data RAM (
×××××32-bit)
32 K-byte
Command ROM (
×××××64-bit)
512 K-byte
Type
MN103S77N
Package
LQFP128-P-1818C *Lead-free
Minimum Instruction
Execution Time
16.7 ns (at 2.7 V to 3.6 V, 60 MHz)
Interrupts
RESET IRQ
× 9 NMI Timer × 28 SIF × 10 I2C × 3 Time base timer × 2
DMA
× 12 WDT A/D System error
Timer Counter
8-bit timer
× 10
Reload-down count
Cascade connection possible (usable as a 16-bit to 32-bit timer)
16-bit timer
× 6
Up-down count
Input capture function
PWM generating function
Compare/capture register 2-ch.
Time base timer
× 1
Watchdog timer
× 1
MAF00015CEM
DMA Controller
Number of channels: 4
Unit of transfer: 8/16/32 bits
Max. Transfer cycles: 65535
Staring factor: external interrupt, timer factor, serial transmission/reception factor, I2C transmission/reception
factor, external transmission request factor, A/D conversion finish, software factor
Transfer method: 2-bus cycle transfer
Adressing modes: fixed, increment, decrement
Transfer modes: word transfer, burst transfer, intermittent transfer
Serial Interface
UART/synchronous/multi-master I2C interface selective: 3
UART/synchronous interface selective: 2
I/O Pins
104
Common use
I/O
A/D Inputs
10-bit
× 12-ch.
Electrical Characteristics
D/A Outputs
8-bit
× 4-ch.
ROM Collection
8-ch.
A/D conversion performance
Limit
Symbol
Condition
min
typ
max
Unit
Parameter
10
Bits
AVDD = 3.3 V
± 4
LSB
VSS = 0 V
± 4
LSB
Resolution
Non-linear error
Differential non-linearity error
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