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參數(shù)資料
| 型號： | MN101E31G |
| 廠商： | PANASONIC CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MN101E31G |
| 中文描述： | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 14 MM, LEAD FREE, PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 387K |
| 代理商： | MN101E31G |
MAD00064AEM
MN101E31G
Type
Internal ROM type
ROM (byte)
RAM (byte)
Package (Lead-free)
Minimum Instruction
Execution Time
MN
101
E
31
G
Mask ROM
MN
101
EF
31
G
FLASH
128
K
4
K
LQFP
080
-P-
1414
A (Under development)
50
ns (at
2
.
2
V to
5
.
5
V,
20
MHz)
* at internal
2
,
3
,
4
,
5
,
6
,
8
,
10
times oscillation used
50
ns (at
2
.
2
V to
5
.
5
V,
20
MHz)
Interrupts
6
external interrupts,
25
internal interrupts
RESET, Watchdog, External
0
to
4
, Timer
0
to
4
, Timer
6
, Timer
7
(
2
systems), Timer
8
(
2
systems), Time base, Serial
0
(
2
systems),
Serial
1
(
2
systems), Serial
2
(
2
systems), Serial
3
(
2
systems), Serial
4
, Serial
5
, A/
Ｄ
conversion finish, Automatic transfer, Key
interrupts
Timer Counter
Timer counter
0
:
8
-bit
×
1
(timer pulse output, event count, added pulse (
2
-bit) system PWM output, generation of remote control carrier, simple
pulse measurement, real time output control)
Timer counter
1
:
8
-bit
×
1
(timer pulse output, event count,
16
-bit cascade connected (timer
0
,
1
) timer synchronous output event)
Timer counter
2
:
8
-bit
×
1
(timer pulse output, event count, added pulse (
2
-bit) system PWM output, simple pulse measurement,
24
-bit cascade
connected (timer
0
,
1
,
2
), timer synchronous output event, real timer output control)
Timer counter
3
:
8
-bit
×
1
(timer pulse output, event count, generation of remote control carrier,
16
-bit cascade connected (timer
2
,
3
),
32
-bit
cascade connected (timer
0
,
1
,
2
,
3
))
Timer counter
4
:
8
-bit
×
1
(timer pulse output, added pulse (
2
-bit) system PWM output, event count, serial transfer clock, simple pulse
measurement)
Timer counter
6
:
8
-bit free run timer, time base timer
Timer counter
7
:
16
-bit
×
1
(timer pulse output, event count, High accuracy PWM, High performance IGBT output (cycle/duty continuous variable)
timer synchronous output event, input capture (Both edge available), real timer output control), double buffer compare
register
Timer counter
8
:
16
-bit
×
1
(timer pulse output, event count, High accuracy PWM output (cycle/duty continuous variable) pulse width measurement,
input capture (Both edge available),
32
-bit cascade connected (Timer
7
,
8
),
32
-bitPWM output, synchronous output
event), double buffer compare register
Timer counter A :
8
-bit
×
1
(event count, Serial transfer clock timer, clock for function (timer, serial, LCD))
Watchdog timer
Serial interface
Serial
0
~
3
: UART (full duplex) / synchronous
×
1
Serial
４
: multi master I2C / synchronous
×
1
Serial
5
: I2C slave
×
1
DMA controller
1
systems (External request/internal event request/software request maximum transfer cycles are
255
)
I/O Pins
I/O
70
common use, Specified pull-up/pull-down resistor available, Input/output selectable (bit-unit)
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