參數資料
型號: MN101D10F
廠商: PANASONIC CORP
元件分類: 微控制器/微處理器
英文描述: MN101D10F
中文描述: 8-BIT, MROM, 14.32 MHz, MICROCONTROLLER, PQFP100
封裝: 18 X 18 MM, LEAD FREE, PLASTIC, QFP-100
文件頁數: 1/5頁
文件大?。?/td> 117K
代理商: MN101D10F
RAM (
×
8-bit)
Package
ROM (
×
8-bit)
Type
QFP100-P-1818B
*Lead-free
MN101D10F , MN101D10G
Minimum Instruction
Execution Time
With main clock operated
0.1397
μ
s (at 4.0 V to 5.5 V, 14.32 MHz)
71.5
μ
s (at 2.7 V to 5.5 V fixed to 14.32 MHz internal frequency division)
61
μ
s (at 2.5 V to 5.5 V, 32.768 kHz)
When sub-clock operated
Interrupts
RESET Runaway External 0 External 1 External 2 External 3 External 4
Timer 0 Timer 1 Timer 2 Timer 3 Timer 6 Capstan FG Control HSW
Cylinder(Drum) FG Servo V-sync Synchronous output OSD XDS Serial 0
Serial 1 Serial 2 PWM 4 OSDV-sync
Timer Counter
Timer counter 0: 8-bit
×
1 (timer function)
Clock source ····················· 1/4, 1/16 of system clock frequency
Interrupt source················· overflow of timer counter 0
Timer counter 1: 8-bit
×
1 (timer function, linear timer counter function)
Clock source ····················· 1/4 of system clock frequency; CTL signal
Interrupt source················· overflow of timer counter 1
Timer counter 2: 16-bit
×
1 (timer function, input capture,duty judgment of CTL signal(VISS/VASS detection
function), generation of remote control output carrier frequency)
Clock source ····················· 1/4, 1/16, 1/24 of system clock frequency
Interrupt source················· overflow of timer counter 2; input of CTL specified edge; underflow of timer 2
shift register 4-bit counter; coincidence of timer 2 shift register with timer 2 shift
register compare register
Timer counter 3: 16-bit
×
1 (timer function, generation of serial transmission clock)
Clock source ····················· 1/4, 1/16 of system clock frequency
Interrupt source················· overflow of timer counter 3
Timer counter 5: 19-bit
×
1 (watchdog, stable oscillation waiting function)
Clock source ····················· system clock
Watchdog interrupt source ···
1/2
16
, 1/2
19
of timer counter 5 frequency
Clear by stable oscillation ···
after 256 counts by timer counter 5 (2
18
counts of OSC oscillation clock)
Timer counter 6: 16-bit
×
1 (clock function [max. 2 s])
Clock source ····················· 1/512 of OSC oscillation clock frequency; XI oscillation clock;
1/8, 1/128 of system clock frequency
Interrupt source················· 1/2
13
, 1/2
14
, 1/2
15
overflow of timer counter 6
Serial 0: 8-bit
×
1 (synchronous type)
(transfer direction of MSB/LSB selectable, start condition function)
Clock source ····················· 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency; NSBT0 pin input
Serial 1: 8-bit
×
1 (synchronous type/remote control transmission)
(transfer direction of MSB/LSB selectable, start condition function)
Clock source ····················· 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency; 2-division timer 3
output; NSBT1 pin input
Remote control clock ······· 2-division timer 3 output
Serial Interface
128 K
MN101D10F
MAD00043BEM
2.5 K
Serial 2: 8-bit
×
1 (I
2
C) (master transmission/reception, slave transmission/reception)
Clock source ····················· 1/144 to 1/252 of system clock; SCK pin input
3.5 K
96 K
MN101D10G
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