
Advance Information
MMC2114 MMC2113 MMC2112 — Rev. 1.0
550
Chip Select Module
MOTOROLA
Chip Select Module
21.5 Signals
Table 21-1 provides an overview of the signals described here.
CS[3:0] are chip-select outputs. CS[3:0] are available for
general-purpose input/output (I/O) when not configured for chip select
operation.
21.6 Memory Map and Registers
Table 21-2 shows the chip select memory map. The registers are
21.6.1 Memory Map
Table 21-1. Signal Properties
Name
Function
Reset State
Pullup
CS0
Chip select 0 pin
1
Active
CS1
Chip select 1 pin
1
Active
CS2
Chip select 2 pin
1
Active
CS3
Chip select 3 pin
1
Active
Table 21-2. Chip Select Memory Map
Address
Bits 31–16
Bits 15–0
Access(1), (2)
0x00c2_0000
CSCR0 — Chip Select
Control Register 0
CSCR1 — Chip Select
Control Register 1
S
0x00c2_0004
CSCR2 — Chip Select
Control Register 2
CSCR3 — Chip Select
Control Register 3
S
1. User mode accesses to supervisor-only address locations have no effect and result in a cycle termination transfer error.
2. S = CPU supervisor mode access only.