MM74HCT374: VCC
參數(shù)資料
型號(hào): MM74HCT373MTCX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 7/10頁(yè)
文件大?。?/td> 0K
描述: IC LATCH OCTAL D-TYPE 20-TSSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: 74HCT
邏輯類型: D 型透明鎖存器
電路: 8:8
輸出類型: 三態(tài)
電源電壓: 4.5 V ~ 5.5 V
獨(dú)立電路: 1
延遲時(shí)間 - 傳輸: 25ns
輸出電流高,低: 7.2mA,7.2mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
www.fairchildsemi.com
6
MM
74
H
C
T3
73
MM
74HCT374
AC Electrical Characteristics
MM74HCT374: VCC
5.0V, tr tf 6 ns TA 25qC (unless otherwise specified)
AC Electrical Characteristics
MM74HCT374: VCC
5.0V
r 10%, tr tf 6 ns (unless otherwise specified)
Note 6: CPD determines the no load power consumption, PD CPD VCC2 f ICC VCC, and the no load dynamic current consumption, IS CPD VCC f ICC.
Symbol
Parameter
Conditions
Typ
Guaranteed
Units
Limit
fMAX
Maximum Clock Frequency
50
30
MHz
tPHL, tPLH
Maximum Propagation Delay
CL 45 pF
20
32
ns
to Output
tPZH, tPZL
Maximum Enable Propagation Delay
CL 45 pF
19
28
ns
Control to Output
RL 1 k:
tPHZ, tPLZ
Maximum Disable Propagation Delay
CL 5 pF
17
25
ns
Control to Output
RL 1 k:
tW
Minimum Clock Pulse Width
20
ns
tS
Minimum Setup Time Data to Clock
5
tH
Minimum Hold Time Clock to Data
16
ns
Symbol
Parameter
Conditions
TA 25qCTA 40 to 85qCTA 55 to 125qC
Units
Typ
Guaranteed Limits
fMAX
Maximum Clock Frequency
30
24
20
MHz
tPHL, tPLH Maximum Propagation Delay
CL 50 pF
22
36
45
48
ns
to Output
CL 150 pF
30
46
57
69
ns
tPZH, tPZL Maximum Enable Propagation
CL 50 pF
21
30
37
45
ns
Delay Control to Output
CL 150 pF
30
40
50
60
ns
RL 1 k:
tPHZ, tPLZ Maximum Disable Propagation
CL 50 pF
21
30
37
45
ns
Delay Control to Output
RL 1 k:
tTHL, tTLH Maximum Output Rise
CL 50 pF
8
12
15
18
ns
and Fall Time
tW
Minimum Clock Pulse Width
16
20
24
ns
tS
Minimum Setup Time Data to Clock
20
25
30
ns
tH
Minimum Hold Time Clock to Data
5
ns
CIN
Maximum Input Capacitance
10
pF
COUT
Maximum Output Capacitance
20
pF
CPD
Power Dissipation Capacitance
OC
VCC
5pF
(Note 6)
OC
GND
58
pF
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參數(shù)描述
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