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參數(shù)資料
| 型號(hào)： | MM74HCT164SJX |
| 廠商： | Fairchild Semiconductor |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SHIFT REG 8BIT SIPO 14-SOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | 74HCT |
| 邏輯類型： | 移位寄存器 |
| 輸出類型： | 標(biāo)準(zhǔn) |
| 元件數(shù)： | 1 |
| 每個(gè)元件的位元數(shù)： | 8 |
| 功能： | 串行至并行 |
| 電源電壓： | 2 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SOIC |
| 包裝： | 帶卷 (TR) |
2002 Fairchild Semiconductor Corporation
DS005765
www.fairchildsemi.com
February 1984
Revised February 2002
MM74HCT164
8-Bi
tSeri
al-
in
/Par
all
e
l-
out
Shi
ft
Regi
ster
MM74HCT164
8-Bit Serial-in/Parallel-out Shift Register
General Description
The MM74HCT164 utilizes advanced silicon-gate CMOS
technology. It has the high noise immunity and low con-
sumption of standard CMOS integrated circuits. It also
offers speeds comparable to low power Schottky devices.
This 8-bit shift register has gated serial inputs and CLEAR.
Each register bit is a D-type master/slave flip-flop. Inputs A
& B permit complete control over the incoming data. A
LOW at either or both inputs inhibits entry of new data and
resets the first flip-flop to the low level at the next clock
pulse. A high level on one input enables the other input
which will then determine the state of the first flip-flop. Data
at the serial inputs may be changed while the clock is HIGH
or LOW, but only information meeting the setup and hold
time requirements will be entered. Data is serially shifted in
and out of the 8-bit register during the positive going transi-
tion of the clock pulse. Clear is independent of the clock
and accomplished by a low level at the CLEAR input.
The 74HCT logic family is functionally as well as pin-out
compatible with the standard 74LS logic family. All inputs
are protected from damage due to static discharge by inter-
nal diode clamps to VCC and ground.
MM74HCT devices are intended to interface between TTL
and NMOS components and standard CMOS devices.
These parts are also plug-in replacements for LS-TTL
devices and can be used to reduce power consumption in
existing designs.
Features
s Typical propagation delay: 20 ns
s Low quiescent current: 40
A maximum (74HCT Series)
s Low input current: 1
A maximum
s Fanout of 10 LS-TTL loads
s TTL input compatible
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number
Package Number
Package Description
MM74HCT164M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HCT164SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HCT164N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
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PDF描述 |
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| VE-B6K-MU-B1 | CONVERTER MOD DC/DC 40V 200W |
| MM74HCT164SJ | IC SHIFT REG 8BIT SIPO 14-SOP |
| 74AC00SCX | IC GATE NAND QUAD 2INPUT 14-SOIC |
| 74ACT32SCX | IC GATE OR QUAD 2INPUT 14-SOIC |
| VI-BN2-MU-B1 | CONVERTER MOD DC/DC 15V 200W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM74HCT190 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Level changes on Enable or Down/Up can be made regardless of the level of the clock |
| MM74HCT191 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Level changes on Enable or Down/Up can be made regardless of the level of the clock |
| MM74HCT193 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Synchronous Binary Up/Down Counters |
| MM74HCT193J | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Synchronous Binary Up/Down Counters |
| MM74HCT193N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Synchronous Binary Up/Down Counters |
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