參數(shù)資料
型號: MM74HC132SJ
廠商: Fairchild Semiconductor
文件頁數(shù): 1/9頁
文件大?。?/td> 0K
描述: IC SCHMITT TRIGGER QUAD 14-SOP
標準包裝: 47
系列: 74HC
邏輯類型: 與非門
電路數(shù): 4
輸入數(shù): 2
特點: 施密特觸發(fā)器
電源電壓: 2 V ~ 6 V
電流 - 靜態(tài)(最大值): 2µA
輸出電流高,低: 5.2mA,5.2mA
邏輯電平 - 低: 0.3 V ~ 1.2 V
邏輯電平 - 高: 1.5 V ~ 4.2 V
額定電壓和最大 CL 時的最大傳播延遲: 21ns @ 6V,50pF
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
供應商設(shè)備封裝: 14-SOIC
封裝/外殼: 14-SOIC(0.209",5.30mm 寬)
包裝: 管件
MM74HC132
Quad
2-Input
NAND
Sc
hmitt
T
rig
g
e
r
1983 Fairchild Semiconductor Corporation
www.fairchildsemi.com
MM74HC132 Rev. 1.3.0
February 2008
MM74HC132
Quad 2-Input NAND Schmitt Trigger
Features
Typical propagation delay: 12ns
Wide power supply range: 2V–6V
Low quiescent current: 20A maximum (74HC Series)
Low input current: 1A maximum
Fanout of 10 LS-TTL loads
Typical hysteresis voltage: 0.9V at VCC = 4.5V
General Description
The MM74HC132 utilizes advanced silicon-gate CMOS
technology to achieve the low power dissipation and
high noise immunity of standard CMOS, as well as the
capability to drive 10 LS-TTL loads.
The 74HC logic family is functionally and pinout compat-
ible with the standard 74LS logic family. All inputs are
protected from damage due to static discharge by inter-
nal diode clamps to VCC and ground.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Top View
Logic Diagram
Order Number
Package
Number
Package Description
MM74HC132M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC132SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC132MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC132N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
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