參數(shù)資料
型號(hào): MM74C164MX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): 計(jì)數(shù)移位寄存器
中文描述: CMOS SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14
封裝: 0.150 INCH, MS-012, SOIC-14
文件頁(yè)數(shù): 4/7頁(yè)
文件大?。?/td> 75K
代理商: MM74C164MX
www.fairchildsemi.com
4
M
74C164
AC Electrical Characteristics (Note 2)
TA = 25°C, CL = 50 pF, unless otherwise noted
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics application note
AN-90.
Typical Applications
74C Compatibility
Guaranteed Noise Margin
as a Function of VCC
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tpd1
Propagation Delay Time to a Logical “0” or a
VCC = 5V
230
310
ns
Logical “1” from Clock to Q
VCC = 10V
90
120
tpd0
Propagation Delay Time to a Logical “0” from VCC = 5V
280
380
ns
Clear to Q
VCC = 10V
110
150
tS
Time Prior to Clock Pulse that Data
VCC = 5V
200
110
ns
Must be Present
VCC = 10V
80
30
tH
Time After Clock Pulse that
VCC = 5V
0
ns
Data Must be Held
VCC = 10V
0
fMAX
Maximum Clock Frequency
VCC = 5V
2.0
3
MHz
VCC = 10V
5.5
8
tW
Minimum Clear Pulse Width
VCC = 5V
150
250
ns
VCC = 10V
55
90
tr, tf
Maximum Clock Rise and Fall Time
VCC = 5V
15
s
VCC = 10V
5
CIN
Input Capacitance
Any Input (Note 3)
5
pF
CPD
Power Dissipation Capacitance
(Note 4)
140
pF
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