參數(shù)資料
型號(hào): MM74C08MX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): 門(mén)電路
英文描述: CMOS SERIES, QUAD 2-INPUT AND GATE, PDSO14
封裝: 0.150 INCH, MS-012, SOIC-14
文件頁(yè)數(shù): 1/5頁(yè)
文件大?。?/td> 56K
代理商: MM74C08MX
2002 Fairchild Semiconductor Corporation
DS005878
www.fairchildsemi.com
October 1987
Revised May 2002
MM74C08
Q
u
ad
2-
Inp
u
tAN
D
Gate
MM74C08
Quad 2-Input AND Gate
General Description
The MM74C08 employs complementary MOS (CMOS)
transistors to achieve wide power supply operating range,
low power consumption and high noise margin, these
gates provide basic functions used in the implementation of
digital integrated circuit systems. The N- and P-channel
enhancement mode transistors provide a symmetrical cir-
cuit with output swing essentially equal to the supply volt-
age. No DC power other than that caused by leakage
current is consumed during static condition. All inputs are
protected from damage due to static discharge by diode
clamps to VCC and GND.
Features
s Wide supply voltage range:
3.0V to 15V
s Guaranteed noise margin: 1.0V
s High noise immunity: 0.45 VCC (typ.)
s Low power TTL compatibility:
Fan out of 2 driving 74L
s Low power consumption: 10 nW/package (typ.)
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Top View
Truth Table
H
= HIGH Level
L
= LOW Level
Order Number
Package Number
Package Description
MM74C08M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74CD8N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Inputs
Outputs
AB
Y
LLL
LH
L
HL
L
HHH
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