![](http://datasheet.mmic.net.cn/190000/MM54HC138J_datasheet_14937462/MM54HC138J_2.png)
Absolute Maximum Ratings (Notes12)
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Supply Voltage (VCC)
b
05 to a70V
DC Input Voltage (VIN)
b
15 to VCCa15V
DC Output Voltage (VOUT)
b
05 to VCCa05V
Clamp Diode Current (IIK IOK)
g
20 mA
DC Output Current per pin (IOUT)
g
25 mA
DC VCC or GND Current per pin (ICC)
g
50 mA
Storage Temperature Range (TSTG)
b
65 Cto a150 C
Power Dissipation (PD)
(Note 3)
600 mW
SO Package only
500 mW
Lead Temp (TL) (Soldering 10 seconds)
260 C
Operating Conditions
Min
Max
Units
Supply Voltage (VCC)2
6
V
DC Input or Output Voltage
0
VCC
V
(VIN VOUT)
Operating Temp Range (TA)
MM74HC
b
40
a
85
C
MM54HC
b
55
a
125
C
Input Rise or Fall Times
VCCe20V
(tr tf)
1000
ns
VCCe45V
500
ns
VCCe60V
400
ns
DC Electrical Characteristics (Note 4)
TAe25 C
74HC
54HC
Symbol
Parameter
Conditions
VCC
TAeb40 to 85 CTAeb55 to 125 C
Units
Typ
Guaranteed Limits
VIH
Minimum High Level
20V
15
V
Input Voltage
45V
315
V
60V
42
V
VIL
Maximum Low Level
20V
05
V
Input Voltage
45V
135
V
60V
18
V
VOH
Minimum High Level
VINeVIH or VIL
Output Voltage
lIOUTls20 mA
20V
20
19
V
45V
45
44
V
60V
60
59
V
VINeVIH or VIL
lIOUTls40 mA
45V
42
398
384
37
V
lIOUTls52 mA
60V
57
548
534
52
V
VOL
Maximum Low Level
VINeVIH or VIL
Output Voltage
lIOUTls20 mA
20V
0
01
V
45V
0
01
V
60V
0
01
V
VINeVIH or VIL
lIOUTls40 mA
45V
02
026
033
04
V
lIOUTls52 mA
60V
02
026
033
04
V
IIN
Maximum Input
VINeVCC or GND
60V
g
01
g
10
g
10
m
A
Current
ICC
Maximum Quiescent
VINeVCC or GND
60V
80
160
m
A
Supply Current
IOUTe0 mA
Note 1
Absolute Maximum Ratings are those values beyond which damage to the device may occur
Note 2
Unless otherwise specified all voltages are referenced to ground
Note 3
Power Dissipation temperature derating
plastic ‘‘N’’ package b12 mW C from 65 Cto85 C ceramic ‘‘J’’ package b12 mW C from 100 Cto125 C
Note 4
For a power supply of 5V g10% the worst case output voltages (VOH and VOL) occur for HC at 45V Thus the 45V values should be used when designing
with this supply Worst case VIH and VIL occur at VCCe55V and 45V respectively (The VIH value at 55V is 385V) The worst case leakage current (IIN ICC and
IOZ) occur for CMOS at the higher voltage and so the 60V values should be used
VIL limits are currently tested at 20% of VCC The above VIL specification (30% of VCC) will be implemented no later than Q1 CY’89
2