參數(shù)資料
型號(hào): ML9044A-XXBCVWA
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 顯示控制器
英文描述: 17 X 120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC175
封裝: GOLD BUMP, DIE-175
文件頁數(shù): 22/64頁
文件大?。?/td> 696K
代理商: ML9044A-XXBCVWA
PEDL9044A-04
OKI Semiconductor
ML9044A-xxA/xxB
29/64
Built-in Reset Circuit
The ML9044A is automatically initialized when the power is turned on.
During initialization, the Busy Flag (BF) is “1” and the ML9044A does not accept any instruction from the CPU
(other than the Read BF instruction).
The Busy Flag is “1” for about 15 ms after the VDD becomes 2.7 V or higher.
During this initialization, the ML9044A performs the following instructions:
1)
Display clearing
2)
CPU interface data length = 8 bits
(DL = “1”)
3)
1-line LCD display
(N = “0”)
4)
Font size = 5
× 7 dots
(F = “0”)
5)
ADC counting = Increment
(I/D = “1”)
6)
Display shifting = None
(S = “0”)
7)
Display = Off
(D = “0”)
8)
Cursor = Off
(C = “0”)
9)
Blinking = Off
(B = “0”)
10) Arbitrator = Displayed in the lower line
(AS = “0”)
11) Setting 1FH (hexadecimal) to the Contrast Data
To use the built-in reset circuit, the power supply conditions shown below should be satisfied. Otherwise, the
built-in reset circuit may not work properly. In such a case, initialize the ML9044A with the instructions from the
CPU. The use of a battery always requires such initialization from the CPU. (See “Initial Setting of Instructions”)
t
ON
2.7 V
0.2 V
t
OFF
0.1 ms
≤ t
ON ≤100 ms
1ms
≤ t
OFF
Figure 1 Power-on and Power-off Waveform
相關(guān)PDF資料
PDF描述
ML9044A-51BCVWA 17 X 120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC175
ML9204-XXGA 24 X 35 DOTS FLUORESCENT DSPL CTRL, PQFP128
ML9207-XXGP 24 X 36 DOTS FLUORESCENT DSPL CTRL, PQFP80
ML9208-01MB 16 X 35 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PDSO64
ML9208-01GA 16 X 35 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP64
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