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參數(shù)資料
| 型號： | ML9044-XXACVWA |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 顯示控制器 |
| 英文描述： | 17 X 120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC189 |
| 封裝： | 10.62 X 2.55 MM, GOLD BUMP, DIE-189 |
| 文件頁數(shù)： | 29/60頁 |
| 文件大?。?/td> | 579K |
| 代理商： | ML9044-XXACVWA |
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PEDL9044-03
1Semiconductor
ML9044-xxA/xxB
35/60
3) Entry Mode Setting
RS1
1
RS0
0
R/
W
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
0
DB2
1
DB1
I/D
DB0
S
Instruction code:
(1)
When the I/D is set, the cursor or blink shifts to the right by 1 character position (ID= “1”; increment) or to
the left by 1 character position (I/D= “0”; decrement) after an 8-bit character code is written to or read
from the DDRAM. At the same time, the address counter (ADC) is also incremented by 1 (when I/D =
“1”; increment) or decremented by 1 (when I/D = “0”; decrement). After a character pattern code is
written to or read from the CGRAM, the address counter (ADC) is incremented by 1 (when I/D = “1”;
increment) or decremented by 1 (when I/D = “0”; decrement).
Also after data is written to or read from the ABRAM, the address counter (ADC) is incremented by 1
(when I/D = “1”; increment) or decremented by 1 (when I/D = “0”; decrement).
(2)
When S = “1”, the cursor or blink stops and the entire display shifts to the left (I/D = “1”) or to the right
(I/D = “0”) by 1 character position after a character code is written to the DDRAM.
In the case of S = “1”, when a character code is read from the DDRAM, when a character pattern data is
written to or read from the CGRAM or when data is written to or read from the ABRAM, normal
read/write is carried out without shifting of the entire display. (The entire display does not shift, but the
cursor or blink shifts to the right (I/D = “1”) or to the left (I/D = “0”) by 1 character position.)
When S = “0”, the display does not shift, but normal write/read is performed.
Note:
The execution time of this instruction is 37
s (maximum) at an oscillation frequency of
270 kHz.
4) Display Mode Setting
RS1
1
RS0
0
R/
W
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
1
DB2
D
DB1
C
DB0
B
Instruction code:
(1)
The “D” bit (DB2) of this instruction determines whether or not to display character patterns on the LCD.
When the “D” bit is “1”, character patterns are displayed on the LCD.
When the “D” bit is “0”, character patterns are not displayed on the LCD and the cursor/blink setting is
also canceled.
Note:
Unlike the Display Clear instruction, this instruction does not change the character code in the
DDRAM and ABRAM.
(2)
When the “C” bit (DB1) is “0”, the cursor turns off. When both the “C” and “D” bits are “1”, the cursor
turns on.
(3)
When the “B” bit (DB0) is “0”, blinking is canceled. When both the “B” and “D” bits are “1”, blinking is
performed.
In the Blinking mode, all dots including those of the cursor, the character pattern and the cursor are
alternately displayed.
Note:
The execution time of this instruction is 37
s (maximum) at an oscillation frequency of
270 kHz.
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| ML9044-XXBCVWA | 17 X 120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC175 |
| ML9044A-XXACVWA | 17 X 120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC189 |
| ML9203-01GA | 16 X 35 DOTS FLUORESCENT DSPL CTRL, PQFP100 |
| ML9206-XXGS-BK | 16 X 37 DOTS FLUORESCENT DSPL CTRL, PQFP64 |
| ML9206-XXGS-K | 16 X 37 DOTS FLUORESCENT DSPL CTRL, PDSO64 |
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