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參數(shù)資料
| 型號(hào)： | ML9042-11CVWA |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 顯示控制器 |
| 英文描述： | 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233 |
| 封裝： | DIE-233 |
| 文件頁(yè)數(shù)： | 31/58頁(yè) |
| 文件大?。?/td> | 558K |
| 代理商： | ML9042-11CVWA |
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FEDL9042-01
OKI Semiconductor
ML9042-xx
37/58
Expansion Instruction Codes
The busy status of the ML9042 is rather longer than the cycle time of the CPU, since the internal processing of the
ML9042 starts at a timing which does not affect the display on the LCD. In the busy status (Busy Flag is “1”), the
ML9042 executes the Busy Flag Read instruction only. Therefore, the CPU should ensure that the Busy Flag is
“0” before sending an expansion instruction code to the ML9042.
1) Arbitrator Display Line Set
RS1
0
RS0
0
R/
W
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
0
DB2
0
DB1
1
DB0
AS
Expansion instruction code:
This expansion instruction code sets the Arbitrator display line. The relationship between the status of this bit
and the common outputs is as follows:
For display examples, refer to LCD Drive Waveforms section.
ABE bit
CSR bit
duty
AS bit
Shift direction
Arbitrator’s common pin
L
1/8
L
COM1
→COM8
None
L
1/8
H
COM1
→COM8
None
L
1/16
L
COM1
→COM16
None
L
1/16
H
COM1
→COM16
None
L
H
1/8
L
COM8
→COM1
None
L
H
1/8
H
COM8
→COM1
None
L
H
1/16
L
COM16
→COM1
None
L
H
1/16
H
COM16
→COM1
None
H
L
1/9
L
COM1
→COM9
COM9
H
L
1/9
H
COM1
→COM9
COM1
H
L
1/17
L
COM1
→COM17
COM17
H
L
1/17
H
COM1
→COM17
COM1
H
1/9
L
COM9
→COM1
COM1
H
1/9
H
COM9
→COM1
COM9
H
1/17
L
COM17
→COM1
COM1
H
1/17
H
COM17
→COM1
COM17
Note:
The execution time of this instruction is 37
s at an oscillation frequency (OSC) of
270 kHz.
2) ABRAM Address Setting
RS1
0
RS0
0
R/
W
1
DB7
0
DB6
1
DB5
1
DB4
H4
DB3
H3
DB2
H2
DB1
H1
DB0
H0
Expansion instruction code:
This instruction sets the ABRAM address to the data represented by the bits H4 to H0 (binary).
The ABRAM addresses are valid until CGRAM or DDRAM addresses are set.
The CPU writes or reads the Display-ON data starting from the one represented by the ABRAM address bits H4
to H0 set in the instruction code at that time.
When the ABRAM address represented by bits H4 to H0 (binary) is in the range “00” to “13” in hexadecimal,
data is output to the LCD as the arbitrator.
Note: The execution time of this instruction is 37
s at an oscillation frequency (OSC) of 270 kHz.
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| ML9042-21DVWA | 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML9042-54CVWA-5016 | 制造商:ROHM Semiconductor 功能描述:RHOML9042-54CVWA-5016 OKI LCD DRIVER |
| ML9044 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
| ML9044A | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
| ML9044A-XXACVWA | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
| ML9044A-XXBCVWA | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER DRIVER |
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