參數(shù)資料
型號: ML9041A-01ACVWA
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 顯示控制器
英文描述: 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC189
封裝: 10.62 X 2.55 MM, GOLD BUMP, DIE-189
文件頁數(shù): 35/64頁
文件大小: 653K
代理商: ML9041A-01ACVWA
PEDL9041A-02
OKI Semiconductor
ML9041A-xxA/xxB
40/64
3) Contrast Adjusting Data Read
RS1
0
RS0
0
R/W
1
DB7
0
DB6
0
DB5
0
DB4
G4
DB3
G3
DB2
G2
DB1
G1
DB0
G0
Expansion instruction code:
This instruction reads contrast adjusting data (G
4 to G0) from the contrast register.
Note: The execution time of this instruction is 37
s at an oscillation frequency (OSC) of 270 kHz.
4) ABRAM Address Setting
RS1
0
RS0
0
R/W
1
DB7
0
DB6
1
DB5
1
DB4
H4
DB3
H3
DB2
H2
DB1
H1
DB0
H0
Expansion instruction code:
This instruction sets the ABRAM address to the data represented by the bits H
4 to H0 (binary).
The ABRAM addresses are valid until CGRAM or DDRAM addresses are set.
The CPU writes or reads the Display-ON data starting from the one represented by the ABRAM address bits H
4
to H
0 set in the instruction code at that time.
When the ABRAM address represented by bits H
4 to H0 (binary) is in the range “00” to “13” in hexadecimal,
data is output to the LCD as the arbitrator.
Note: The execution time of this instruction is 37
s at an oscillation frequency (OSC) of 270 kHz.
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ML9041A-XXBCVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC175
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