參數資料
型號: ML9041A-01ACVWA
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 顯示控制器
英文描述: 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC189
封裝: 10.62 X 2.55 MM, GOLD BUMP, DIE-189
文件頁數: 22/64頁
文件大小: 653K
代理商: ML9041A-01ACVWA
PEDL9041A-02
OKI Semiconductor
ML9041A-xxA/xxB
29/64
Built-in Reset Circuit
The ML9041A is automatically initialized when the power is turned on.
During initialization, the Busy Flag (BF) is “1” and the ML9041A does not accept any instruction from the CPU
(other than the Read BF instruction).
The Busy Flag is “1” for about 15 ms after the V
DD becomes 2.7 V or higher.
During this initialization, the ML9041A performs the following instructions:
1)
Display clearing
2)
CPU interface data length = 8 bits
(DL = “1”)
3)
1-line LCD display
(N = “0”)
4)
Font size = 5
× 7 dots
(F = “0”)
5)
ADC counting = Increment
(I/D = “1”)
6)
Display shifting = None
(S = “0”)
7)
Display = Off
(D = “0”)
8)
Cursor = Off
(C = “0”)
9)
Blinking = Off
(B = “0”)
10) Arbitrator = Displayed in the lower line
(AS = “0”)
11) Setting 1FH (hexadecimal) to the Contrast Data
To use the built-in reset circuit, the power supply conditions shown below should be satisfied. Otherwise, the
built-in reset circuit may not work properly. In such a case, initialize the ML9041A with the instructions from the
CPU. The use of a battery always requires such initialization from the CPU. (See “Initial Setting of Instructions”)
t
ON
2.7 V
0.2 V
t
OFF
0.1 ms
≤ t
ON ≤100 ms
1 ms
≤ t
OFF
Figure 1 Power-on and Power-off Waveform
相關PDF資料
PDF描述
ML9041A-01ACVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC189
ML9041A-XXBCVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC175
ML9042-01DVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
ML9042-01CVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
ML9042-01DVWA 17 X 100 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC233
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