參數(shù)資料
型號(hào): ML63326-XXXTC
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQFP176
封裝: 24 X 24 MM, 0.50 MM PITCH, PLASTIC, LQFP-176
文件頁(yè)數(shù): 11/69頁(yè)
文件大?。?/td> 1770K
代理商: ML63326-XXXTC
FEDL87V3104-03
OKI Semiconductor
ML87V3104
19/69
3.1.5 LCD data output control
Three types of control registers are provided in this LSI device for control of the LCD data output.
The register COLORD can be used for changing R, G, B sequence in a color LCD. This is also valid in the frame
sequential color mode.
The register DPDMOD is used for inverting the bits of the output data or for making the data all-zero or all-one.
The register DPMENB can be used for stopping the display memory readout operation itself. At this time, even
the LCD driving signals will be stopped. Further, it is also possible to specify the level of the DISP signal output.
The register REFENB controls the refresh operation of the display memory (embedded DRAM). If the refresh
operation is stopped, the entire contents of the display memory will be lost. Along with the register DPMENB, this
register is useful for achieving low power consumption when no display is being made.
Control registers:
COLORD
[#01h; bit7]:
Color arrangement sequence of the color LCD panel
COLORD
Color arrangement sequence
0 0 0
R, G, B, R, G, B,
0 0 1
G, B, R, G, B, R,
0 1 0
B, R, G, B, R, G,
1 0 1
R, B, G, R, B, G,
1 1 0
G, R, B, G, R, B,
1 1 1
B, G, R, B, G, R,
DPDMOD
[#01h; bit3-2]: LCD data display mode
DPDMOD
LCD data display mode
0 0
Normal
0 1
Reverse
1 0
All ‘0’
1 1
All ‘1’
DPMENB
[#01h; bit1-0]:
Display memory readout control, definition of DISP signal output
DPMENB
Display memory readout
DISP signal
0 0
Memory readout stopped
DISP = ‘L’
0 1
LCD drive stopped
DISP = ‘H’
1 0
Memory readout operating
DISP = ‘L’
1 1
LCD drive operating
DISP = ‘H’
REFENB
[#02h, bit7, 3]: Embedded DRAM refresh operation enable
REFENB
1
0
DRAM refresh operation
0
X
Fully stopped (sleep mode)
*1
0
Operation only during blanking
1
Always operating
*1: The contents of the display memory will be lost in the sleep mode.
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ML63326-XXX 4-BIT, MROM, 2.048 MHz, MICROCONTROLLER, UUC159
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