參數(shù)資料
型號: ML63295A-XXXWA
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC212
封裝: 8.25 X 8.20 MM, 0.35 MM HEIGHT, DIE-212
文件頁數(shù): 35/39頁
文件大?。?/td> 253K
代理商: ML63295A-XXXWA
FEDL63295A-02
1Semiconductor
ML63295A
4/38
BLOCK DIAGRAM
Asterisks (*) indicate the port secondary functions. Signal names enclosed by chain lines (
) indicate interface
signals of the V
DDI power supply system.
Signal names enclosed by
indicates signals of the V
DDE power
supply system.
nX-4/250
TIMING
CO NT.
CBR
EBR
H
L
X
Y
RA
MIE
A
INSTRUCTIO N
DECO DER
IR
BUS
CO NT.
RO M
32 KW
SP
RSP
C
G
Z
STACK
CAL.S:16-level
REG .S:16-level
PC
ALU
TBC
RST
TST
XT 0
XT 1
OSC0
OSC1
OSC
RESET
MELO DY
I/O
PORT
OUTPUT
INT
4
INT
4
TST2
DA
TA
B
U
S
BLD
WDT
INT
1
TST1
100HzTC
INT
1
V
DDX1
BIAS
EXTMEM
64 KB
D0-7*
A0-15*
RD*
WR *
MD
MDB
P8.0-P8.3
P9.0-P9.3
PA.0-PA.3
P2.0-P2.3
P3.0-P3.3
P4.0-P4.3
P5.0-P5.3
LCD
&
DSPR
CO M1-CO M32
SEG 0-SEG 95
V
DDI
V
SS
PB.0-PB.3
PC.0-PC.3
TIMER
8 bit (2ch)
INT
2
T2CK*
T3CK*
SIO
RXC*
TXC*
INT
2
RXD*
TXD*
PE.0-PE.3
P6.0-P6.3
P7.0-P7.3
MULDIV
SFT
SCLK*
SOUT*
SIN*
INPUT
PORT
INT
1
P0.0-P0.3
P1.0-P1.3
INT
1
INT
1
RAM
2048N
INT
VR
V
DDL
V
DD
V
DDX2
V
DDX3
V
DDX4
C1
C2
V
DD1
V
DD2
V
DD3
V
DD4
V
DD5
V
DD6
V
DDE
CPU core
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