參數(shù)資料
型號: ML4869ES-3
英文描述: Medium Current Boost Regulator with Load Disconnect
中文描述: 中等電流升壓穩(wěn)壓器與負載斷開
文件頁數(shù): 7/8頁
文件大?。?/td> 200K
代理商: ML4869ES-3
ML4869
7
In applications where the ML4869 is operated at or near
the maximum output current, it is recommended to add a
10nF to 100nF ceramic or film capacitor from V
OUT
to
GND. The optimum value of the high frequency bypass
capacitor is dependent on the layout and the value of the
bulk output capacitor selected.
INPUT CAPACITOR
Due to the high input current drawn at startup and
possibly during operation, it is recommended to decouple
the input with a capacitor with a value of 47μF to 100μF.
This filtering prevents the input ripple from affecting the
ML4869 control circuitry, and also improves the
efficiency by reducing the I
2
R losses during the charge
cycle of the inductor. Again, a low ESR capacitor (such as
tantalum) is recommended.
It is also recommended that low source impedance
batteries be used. Otherwise, the voltage drop across the
source impedance during high input current situations will
cause the ML4869 to fail to startup or to operate
unreliably. In general, for two cell applications the source
impedance should be less than 400m
W
, which means that
small alkaline cells should be avoided.
SHUTDOWN
To guarantee proper operation, SHDN must be pulled to
within 0.5V of GND or V
IN
to prevent excessive power
dissipation and possible oscillations. A graph of input
leakage current while in shutdown is shown in Figure 6.
LAYOUT
Good layout practices will ensure the proper operation of
the ML4869. Some layout guidelines follow:
Use adequate ground and power traces or planes
Keep components as close as possible to the ML4869
Use short trace lengths from the inductor to the V
L1
and
V
L2
pins and from the output capacitor to the V
OUT
pin
Use a single point ground for the ML4869 PWR GND
pin and the input and output capacitors, and connect
the GND pin to PWR GND using a separate trace
Separate the ground for the converter circuitry from the
ground of the load circuitry and connect at a single
point
Figure 8. Design Example Schematic Diagram
DEISGN CONSIDERATIONS
(Continued)
DESIGN EXAMPLE
In order to design a boost converter using the ML4869,
it is necessary to define the values of a few parameters.
For this example, we have assumed that V
IN
= 3.0V to
3.6V, V
OUT
= 5.0V, and I
OUT(MAX)
= 250mA
First, it must be determined whether the ML4869 is
capable of delivering the output current. This is done
using Equation 1:
I
V
V
A
O U T
V
IN M IN
(
5
(
)
)
.
.
5
0 686
0 267
=
×
Next, select an inductor:
As previously mentioned, it is the recommended
inductance is 10μH. Make sure that the peak current
rating of the inductor is at least 1.0A, and that the DC
resistance of the inductor is in the range of 50 to 100m
W
.
Finally, the value of the output capacitor is determined
using Equation 3:
C
H
V
F
OUT
=
50
.
=
44 10
88
μ
μ
The closest standard value would be a 100μF capacitor
with an ESR rating of 100m
W
. If such a low ESR value
cannot be found, two 47μF capacitors in parallel could
also be used.
The complete circuit is shown in Figure 8. As mentioned
previously, the use of an input supply bypass capacitor is
strongly recommended.
ML4869
VOUT
100μF
100μF
VIN
10μH
(SUMIDA CD5A)
0.01μF
VL1
VIN
GND
SHDN
PWR GND
NC
VL2
VOUT
相關PDF資料
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