參數(shù)資料
型號(hào): ML4830
廠商: Fairchild Semiconductor Corporation
英文描述: Electronic Ballast Controller(電子整流器控制器)
中文描述: 電子鎮(zhèn)流器控制器(電子整流器控制器)
文件頁數(shù): 2/15頁
文件大?。?/td> 134K
代理商: ML4830
ML4830
2
REV. 1.0 10/12/2000
PIN CONFIGURATION
PIN# NAME
FUNCTION
PIN# NAME
FUNCTION
1
IA–
Inverting input of the PFC average
current error amplifier
2
IA OUT
Output and compensation node of the
PFC average current error amplifier
3
I(SINE)
PFC gain modulator input
4
IA+/I(LIM)
Non-Inverting input of the PFC
average current error amplifier and
input of peak current limit comparator
5
LAMP F.B.
Inverting input of an Error Amplifier
used to sense (and regulate) lamp arc
current. Also the input node for
dimming control
6
LFB OUT
Output from the Lamp Current Error
Amplifier used for lamp current loop
compensation
7
R(SET)
External resistor which sets oscillator
FMAX, and R(X)/C(X) charging current
8
MODE
Controls how the Lamp Current Error
Amp and preheat timers modulate the
ballast outputs. Two Variable
Frequency and 1 PWM mode are
available through this pin
9
10
R(T)/C(T)
INTERRUPT A voltage of greater than V
REF
resets
the chip and causes a restart after a
delay of 3 times the start interval. Used
for lamp-out detection and restart
Oscillator timing components
PIN DESCRIPTION
11
OVP/
INHIBIT
When the voltage of this pin exceeds
5V, the PFC output is inhibited. When
the voltage exceeds 6.7V, the IC
function is inhibited and the IC is
reset. This pin can be used for a
remote ballast shutdown.
12
R(X)/C(X)
Sets the timing for the preheat,
dimming lockout and interrupt
13
GND
IC Ground
14
OUT B
Ballast MOSFET drive output
15
OUT A
Ballast MOSFET drive output
16
PFC OUT
Power Factor MOSFET drive output
17
VCC
Positive Supply for the IC
18
V
REF
Buffered output for the 7.5V voltage
reference
19
EA–
Inverting input to PFC error amplifier
20
EA OUT
PFC Error Amplifier output and
compensation node
IA–
IA OUT
I(SINE)
IA+/I(LIM)
LAMP F.B.
LFB OUT
R(SET)
MODE
R(T)/C(T)
INTERRUPT
EA OUT
EA–
V
REF
VCC
PFC OUT
OUT A
OUT B
GND
R(X)/C(X)
OVP/INHIBIT
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
ML4830
20-PIN PDIP (P20)
TOP VIEW
IA–
IA OUT
I(SINE)
IA+/I(LIM)
LAMP F.B.
LFB OUT
R(SET)
MODE
R(T)/C(T)
INTERRUPT
EA OUT
EA–
V
REF
VCC
PFC OUT
OUT A
OUT B
GND
R(X)/C(X)
OVP/INHIBIT
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
ML4830
20-PIN PDIP (P20)
TOP VIEW
相關(guān)PDF資料
PDF描述
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