- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359170 > ML4827IP-2 (FAIRCHILD SEMICONDUCTOR CORP) Fault-Protected PFC and PWM Controller Combo PDF資料下載
參數(shù)資料
| 型號： | ML4827IP-2 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Fault-Protected PFC and PWM Controller Combo |
| 中文描述： | 0.5 A POWER FACTOR CONTROLLER WITH POST REGULATOR, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 256K |
| 代理商： | ML4827IP-2 |
ML4827
11
voltage for which the PWM output transistor must be
rated. Frequently, the design of the tranformer’s reset
winding, and/or of the output transistor’s snubbers or
clamps, require an additional voltage margin of 100V to
200V.
To put some numbers into the discussion, with a given
V
BUSS(MAX)
of 400V:
1. For
δ
= 50%: V
RESET
= {[(1/f
PWM
) x
δ
]/[(1/f
PWM
) x
(1–
δ
)]} x 400V = 0.50/0.50 x 400V = 400V
2. For
δ
= 55%: V
RESET
= 0.55/0.45 x 400V = 489V
3. For
δ
= 60%: V
RESET
= 0.60/0.40 x 400V = 600V
4. For
δ
= 64% (Data Sheet Lower Limit Value): V
RESET
=
0.64/0.36 x 400V = 711V
5. For
δ
= 70%: V
RESET
= 0.70/0.30 x 400V = 933V
6. For
δ
= 74% (Data Sheet Upper Limit Value): V
RESET
=
0.74/0.26 x 400V = 1138V
It is economically desirable to design for the lowest
meaningful voltage on the output MOSFET. It is
simultaneously necessary to design the circuit to operate
FUNCTIONAL DESCRIPTION
(Continued)
at the lowest guaranteed value for
δ
, to ensure that the
magnetics will deliver full output power with any
individual ML4827. In actual operation, the choice of
δ
MIN
= 60% will allow some tolerance for the timing
capacitors and resistors. A tolerance on (R
RAMP2
x
C
RAMP2
) of ±2% is the simplest “brute force” way to
achieve the desired result. This should be combined with
an external duty cycle clamp. This protects the PWM
circuitry against the condition in which the output has
been shorted, and the error amplifier output (V
DC
) would
otherwise be driven to its upper rail. One method which
works well when the PWM is used in voltage mode is to
limit the maximum input to the PWM feedback voltage
(V
DC
). If the voltage available to this pin is derived from
the ML4827’s 7.5V V
REF
, it will be in close ratio to the
charging time of the RAMP2 capacitor. This will be true
whether the RAMP2 capacitor is charged from V
REF
, or, as
is more commonly done in voltage-mode applications,
from the output of the PFC Stage (the “feedforward”
configuration). Figure 3 shows such a duty cycle clamp.
If the ML4827-2’s PWM is to be used in a current-mode
design, the PWM stage will require slope compensation.
This can be done by any of the standard industry
techniques. Note that the ramp to use for this slope
compensation is the voltage on RAMP1.
RAMP2
VDC
VFB
PFC VBUSS
RFB1
RRAMP2
CRAMP2
RFB2
R1
PWM
ERROR
AMP
R2
VREF
δ
MAX =
VRAMP2 (PEAK)
R2 VREF
R1 + R2
Figure 3. ML4827- PWM Duty Cycle Clamp for Voltage-Made Operation
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ML4827CS-2 | Fault-Protected PFC and PWM Controller Combo |
| ML4827CS-1 | Fault-Protected PFC and PWM Controller Combo |
| ML4827 | Fault-Protected PFC and PWM Controller Combo |
| ML4851CS-3 | Low Current, Voltage Boost Regulator |
| ML4861CS-3 | Low Voltage Boost Regulator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML4827IS-1 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:Fault-Protected PFC and PWM Controller Combo |
| ML4827IS-2 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:Fault-Protected PFC and PWM Controller Combo |
| ML4828 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:BiCMOS Phase Modulation/Soft Switching Controller |
| ML4828CP | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:BiCMOS Phase Modulation/Soft Switching Controller |
| ML4828CP UP DIE | 制造商:Fairchild Semiconductor Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。