
1
May 1997
ML2264
*
4-Channel High-Speed 8-Bit
A/D Converter with T/H (S/H)
GENERAL DESCRIPTION
The ML2264 is a high-speed, μP compatible, 4-channel
8-bit A/D converter with a conversion time of 680ns over
the operating temperature range and supply voltage
tolerance. The ML2264 operates from a single 5V supply
and has an analog input range from GND to V
CC
.
The ML2264 has two different pin selectable modes. The
T/H mode has an internal track and hold. The S/H mode
has a true internal sample and hold and can digitize 0 to
5V sinusoidal signals as high as 500kHz.
The ML2264 digital interface has been designed so that
the device appears as a memory location or I/O port to a
μP. Analog input channels are selected by the latched and
decoded multiplexer address inputs.
The ML2264 is an enhanced, pin compatible second
source for the industry standard AD7824. The ML2264
enhancements are faster conversion time, parameters
guaranteed over the supply tolerance and temperature
range, improved digital interface timing, superior power
supply rejection, and better latchup immunity on analog
inputs.
FEATURES
I
Conversion time, WR-RD mode over temperature and
supply voltage tolerance
Track & Hold Mode ................................. 830ns max
Sample & Hold Mode .............................. 700ns max
I
Total unadjusted error.....................±1/2 LSB or ±1 LSB
I
Capable of digitizing a 5V, 250kHz sine wave
I
4-analog input channels
I
No missing codes
I
0V to 5V analog input range with single 5V power
supply
I
No zero or full scale adjust required
I
Analog input protection ...............................25mA min
I
Operates ratiometrically or with up to 5V voltage
reference
I
No external clock required
I
Power-on reset circuitry
I
Low power .......................................................100mW
I
Narrow 24-pin DIP, SOIC, or SSOP
I
Superior pin compatible replacement for AD7824
BLOCK DIAGRAM
PIN CONNECTIONS
A IN 1
A IN 2
A IN 3
A IN 4
4-CH
MUX
ADDRESS
LATCH
DECODE
A0
A1
TIMING
&
CONTROL
INT
CS WR/RDY RD SH/TH MODE
4-BIT
FLASH
A/D
(MSB)
V
CC
+V
REF
–V
REF
GND
SH/TH
Σ
–V
REF
16
+
SAMPLE
&
HOLD
4-BIT
D/A
–
4-BIT
FLASH
A/D
(LSB)
–V
REF
+V
REF
16
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DECODE
LOGIC,
LATCH
&
THREE
STATE
OUTPUT
BUFFER
+V
REF
–V
REF
+V
REF
TOP VIEW
A IN 4
A IN 3
A IN 2
A IN 1
MODE
DB0
DB1
DB2
DB3
RD
INT
GND
V
CC
SH/TH
A0
A1
DB7
DB6
DB5
DB4
CS
WR/RDY
+V
REF
–V
REF
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
A IN 4
A IN 3
A IN 2
A IN 1
MODE
DB0
DB1
DB2
DB3
RD
INT
GND
V
CC
SH/TH
A0
A1
DB7
DB6
DB5
DB4
CS
WR/RDY
+V
REF
–V
REF
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
TOP VIEW
24-Pin DIP
24-Pin SOIC
24-Pin SSOP
*This Part Is End Of Life As Of August 1, 2000