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| 型號(hào)： | MK60X256VLL100 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, LQFP-100 |
| 文件頁(yè)數(shù)： | 43/73頁(yè) |
| 文件大?。?/td> | 1815K |
| 代理商： | MK60X256VLL100 |
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Table 28. Comparator and 6-bit DAC electrical specifications (continued)
Symbol
Description
Min.
Typ.
Max.
Unit
VH
Analog comparator hysteresis1
CR0[HYSTCTR] = 00
CR0[HYSTCTR] = 01
CR0[HYSTCTR] = 10
CR0[HYSTCTR] = 11
—
5
10
20
30
—
mV
VCMPOh
Output high
VDD – 0.5
—
V
VCMPOl
Output low
—
0.5
V
tDHS
Propagation delay, high-speed mode (EN=1,
PMODE=1)
20
50
200
ns
tDLS
Propagation delay, low-speed mode (EN=1,
PMODE=0)
120
250
600
ns
Analog comparator initialization delay2
—
TBD
ns
IDAC6b
6-bit DAC current adder (enabled)
—
7
—
μA
INL
6-bit DAC integral non-linearity
–0.5
—
0.5
LSB3
DNL
6-bit DAC differential non-linearity
–0.3
—
0.3
LSB
1. Typical hysteresis is measured with input voltage range limited to 0.6 to VDD-0.6V.
2. Comparator initialization delay is defined as the time between software writes to change control inputs (Writes to DACEN,
VRSEL, PSEL, MSEL, VOSEL) and the comparator output settling to a stable level.
3. 1 LSB = Vreference/64
Peripheral operating requirements and behaviors
K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
48
Preliminary
Freescale Semiconductor, Inc.
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| MK60X256VLQ100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
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| MK6116LN-15 | 制造商:STME 功能描述: 制造商:STMicroelectronics 功能描述: 制造商:STMicroelectronics 功能描述:2K X 8 STANDARD SRAM, 150 ns, PDIP24 |
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