參數(shù)資料
型號: MK60N256VMC100
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA121
封裝: 8 X 8 MM, MAPBGA-121
文件頁數(shù): 64/72頁
文件大?。?/td> 1812K
代理商: MK60N256VMC100
121
MAP
BGA
Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
VREFL
VSSA
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
VREF_OUT
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
DAC0_OUT/
CMP1_IN3/
ADC0_SE23
DAC0_OUT
DAC0_OUT/
CMP1_IN3/
ADC0_SE23
DAC1_OUT/
CMP2_IN3/
ADC1_SE23
DAC1_OUT
DAC1_OUT/
CMP2_IN3/
ADC1_SE23
XTAL32
EXTAL32
VBAT
PTE24
ADC0_SE17 ADC0_SE17 PTE24
CAN1_TX
UART4_TX
EWM_OUT_
b
PTE25
ADC0_SE18 ADC0_SE18 PTE25
CAN1_RX
UART4_RX
EWM_IN
PTE26
DISABLED
PTE26
UART4_CTS
_b
ENET_1588
_CLKIN
RTC_CLKO
UT
USB_CLKIN
PTA0
JTAG_TCLK/
SWD_CLK/
EZP_CLK
TSI0_CH1
PTA0
UART0_CTS
_b
FTM0_CH5
JTAG_TCLK/
SWD_CLK
EZP_CLK
PTA1
JTAG_TDI/
EZP_DI
TSI0_CH2
PTA1
UART0_RX
FTM0_CH6
JTAG_TDI
EZP_DI
PTA2
JTAG_TDO/
TRACE_SW
O/EZP_DO
TSI0_CH3
PTA2
UART0_TX
FTM0_CH7
JTAG_TDO/
TRACE_SW
O
EZP_DO
PTA3
JTAG_TMS/
SWD_DIO
TSI0_CH4
PTA3
UART0_RTS
_b
FTM0_CH0
JTAG_TMS/
SWD_DIO
PTA4
NMI_b/
EZP_CS_b
TSI0_CH5
PTA4
FTM0_CH1
NMI_b
EZP_CS_b
PTA5
DISABLED
PTA5
FTM0_CH2
RMII0_RXE
R/
MII0_RXER
CMP2_OUT I2S0_RX_BC
LK
JTAG_TRST
PTA10
DISABLED
PTA10
FTM2_CH0
MII0_RXD2
FTM2_QD_P
HA
TRACE_D0
PTA11
DISABLED
PTA11
FTM2_CH1
MII0_RXCLK
FTM2_QD_P
HB
PTA12
CMP2_IN0
PTA12
CAN0_TX
FTM1_CH0
RMII0_RXD1
/MII0_RXD1
I2S0_TXD
FTM1_QD_P
HA
PTA13
CMP2_IN1
PTA13
CAN0_RX
FTM1_CH1
RMII0_RXD0
/MII0_RXD0
I2S0_TX_FS FTM1_QD_P
HB
PTA14
DISABLED
PTA14
SPI0_PCS0
UART0_TX
RMII0_CRS_
DV/
MII0_RXDV
I2S0_TX_BC
LK
PTA15
DISABLED
PTA15
SPI0_SCK
UART0_RX
RMII0_TXEN
/MII0_TXEN
I2S0_RXD
Pinout
K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
67
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