參數(shù)資料
型號(hào)： MK60DX256ZVLQ10
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, LQFP-144
文件頁數(shù)： 44/78頁
文件大?。?/td> 1080K
代理商： MK60DX256ZVLQ10
Table 30. 16-bit ADC with PGA characteristics (continued)
Symbol
Description
Conditions
Min.
Typ.1
Max.
Unit
Notes
EIL
Input leakage
error
All modes
IIn × RAS
mV
IIn = leakage
current
(refer to the
MCU's voltage
and current
operating
ratings)
VPP,DIFF
Maximum
differential input
signal swing
where VX = VREFPGA × 0.583
V
SNR
Signal-to-noise
ratio
Gain=1
Gain=64
TBD
83.0
57.5
—
dB
16-bit
differential
mode,
Average=32
THD
Total harmonic
distortion
Gain=1
Gain=64
TBD
89.4
90.0
—
dB
16-bit
differential
mode,
Average=32,
fin=500Hz
SFDR
Spurious free
dynamic range
Gain=1
Gain=64
TBD
90.9
77.0
—
dB
16-bit
differential
mode,
Average=32,
fin=500Hz
ENOB
Effective number
of bits
Gain=1, Average=4
Gain=1, Average=8
Gain=64, Average=4
Gain=64, Average=8
Gain=1, Average=32
Gain=2, Average=32
Gain=4, Average=32
Gain=8, Average=32
Gain=16, Average=32
Gain=32, Average=32
Gain=64, Average=32
TBD
12.3
12.7
8.4
8.7
13.3
13.1
12.5
11.8
11.1
10.2
9.3
—
bits
16-bit
differential
mode,fin=100H
z
SINAD
Signal-to-noise
plus distortion
ratio
See ENOB
6.02 × ENOB + 1.76
dB
1. Typical values assume VDDA =3.0V, Temp=25°C, fADCK=6MHz unless otherwise stated.
2. This current is a PGA module adder, in addition to and ADC conversion currents.
3. Between IN+ and IN-. The PGA draws a DC current from the input terminals. The magnitude of the DC current is a strong
function of input common mode voltage (VCM) and the PGA gain.
4. Gain = 2PGAG
5. After changing the PGA gain setting, a minimum of 2 ADC+PGA conversions should be ignored.
Peripheral operating requirements and behaviors
K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Freescale Semiconductor, Inc.
Preliminary
49
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MK60DN512ZVLQ10 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
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