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參數(shù)資料
| 型號： | MK5814DMLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 128 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, SOIC-8 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 107K |
| 代理商： | MK5814DMLFT |
MK5814D
SPREAD SPECTRUM CLOCK GENERATOR
SSCG
IDT / ICS SPREAD SPECTRUM CLOCK GENERATOR
3
MK5814D
REV D 041708
Pin Descriptions
External Components
The MK5814D requires a minimum number of external
components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected
between VDD and GND on pins 7 and 2. Connect the
capacitor as close to these pins as possible. For optimum
device performance, mount the decoupling capacitor on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
Series Termination Resistor
Use series termination when the PCB trace between the
clock output and the load is over 1 inch. To series terminate
a 50
Ω trace (a commonly used trace impedance), place a
33
Ω resistor in series with the clock line. Place the resistor
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20
Ω.
Tri-level Select Pin Operation
The S1 and S0 select pins are tri-level, meaning that they
have three separate states to make the selections shown in
the table on page 2. To select the M (mid) level, the
connection to these pins must be eliminated by either
floating them originally, or tri-stating the GPIO pins which
drive the select pins.
PCB Layout Recommendations
For optimum device performance and lowest output phase
noise, observe the following guidelines:
1) Mount the 0.01F decoupling capacitor on the
component side of the board as close to the VDD pin as
possible. No vias should be used between the decoupling
capacitor and VDD pin. The PCB trace to the VDD pin and
the PCB trace to the ground via should be kept as short as
possible.
2) To minimize EMI, place the 33
Ω series-termination
resistor (if needed) close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, thus minimizing vias through other
signal layers. Other signal traces should be routed away
from the MK5814D device. This includes signal traces
located underneath the device, or on layers adjacent to the
ground plane layer used by the device.
Pin
Number
Pin
Name
Pin Type
Pin Description
1
X1/ICLK
Input
Connect to 4-32 MHz crystal or clock input.
2
GND
Power
Connect to ground.
3
S1
Input
Function select 1 input. Selects spread amount and direction per table above.
(default-internal mid-level).
4
S0
Input
Function select 0 input. Selects spread amount and direction per table above.
(default-internal mid-level).
5
SSCLK
Output
Clock output with Spread spectrum
6
FRSEL
Input
Function select for input frequency range. Default to mid-level “M”.
7
VDD
Power
Connect to +3.3 V.
8
X2
XO
Crystal connection to 4-32 MHz crystal. Leave unconnected for clock
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