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參數(shù)資料
| 型號： | MK3732-09R |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 27 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 2/4頁 |
| 文件大?。?/td> | 60K |
| 代理商： | MK3732-09R |
MK3732-09
VCXO and PLL
MDS 3732-09 A
2
Rev 012501
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126 (408) 295-9800 tel (408) 295-9818 fax www.icst.com
PRELIMINARY INFORMATION
Pin Descriptions
Key: I(PU) = Input with internal pull-up resistor; O = Output; P = Power Supply Connection; VI = Analog Voltage Input;
XI, XO = Crystal Pins.
Pin Assignment
Number
Name
Type Description
1
X1
XI
Crystal connection. Connect to a pullable crystal of 27 MHz.
2, 3
VDD
P
Power supply. Connect to +3.3V.
4
VIN
VI
Voltage Input to VCXO. Zero to 3.3V signal which controls the VCXO frequency.
5, 6, 7
GND
P
Connect to ground.
8
S2
I(PU) Select input #2. Selects outputs per table above.
9
CLK3
O
Clock Ouput #3 per table above.
10
S0
I(PU) Select input #0. Selects outputs per table above.
11
CLK2
O
Clock Output #2 per table above.
12
CLK1
O
Clock Output #1 per table above.
13
VDD
P
Power supply. Connect to +3.3V.
14
S1
I(PU) Select input #1. Selects outputs per table above.
15
NC
-
No connect. Do not connect anything to this pin.
16
X2
XO Crystal connection. Connect to a pullable crystal of 27 MHz.
External Components
The MK3732-09 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.01F should be connected between VDD and GND on pins 2 and 5 and pins 3 and 6, as
close to the MK3732-09 as possible. A series termination resistor of 33
may be used for each clock output.
The input crystal must be connected as close to the chip as possible. The input crystal should be a
fundamental mode, parallel resonant, pullable, AT cut. The crystal should have a total ppm error budget over
initial accuracy, temperature, and aging, of 70 ppm, C0/C1 of 250 max, and load capacitance of 14pF.
0=connect directly to GND
1=connect directly to VDD
Clock Select Table
CLK1
S0
CLK2
12
11
10
9
13
14
1
2
3
4
5
6
7
8
VDD
GND
X2
X1
VIN
S2
GND
VDD
CLK3
NC
S1
VDD
16
15
S2
S1
S0
Input
CLK1
CLK2
CLK3
0
27
REF/12
OFF
0
1
27
REF/16
OFF
0
1
0
27
REF
11.0592
REF/2
0
1
27
REF
11.0592
REF/2
1
0
27
REF
14.7456
OFF
1
0
1
27
REF
12.288
OFF
1
0
27
REF
24.576
OFF
1
27
REF
18.432
OFF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK3732-17STR | 49.46 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK3732-17SILF | 49.46 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK3732-17SLF | 49.46 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK3732-17SLF | 49.46 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK3732-17SILF | 49.46 MHz, OTHER CLOCK GENERATOR, PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK3732-10S | 功能描述:IC VCXO/MULTIPLIER 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MK3732-10SLF | 功能描述:時鐘合成器/抖動清除器 VCXO AND MULTIPLIER RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK3732-10SLFTR | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 VCXO AND MULTIPLIER RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MK3732-10STR | 功能描述:IC VCXO/MULTIPLIER 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MK3732-17 | 制造商:ICS 制造商全稱:ICS 功能描述:ADSL VCXO CLOCK SOURCE |
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