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參數(shù)資料
| 型號： | MK3720SLF |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 54 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, SOIC-8 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 57K |
| 代理商： | MK3720SLF |
MK3720
27 MHz and 54 MHz 3.3 Volt VCXO
MDS 3720 D
3
Revision 053100
Printed 11/16/00
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126 (408)295-9800tel www.icst.com
Parameter
Conditions
Minimum
Typical
Maximum
Units
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Referenced to GND
7
V
Inputs and Clock Outputs
Referenced to GND
-0.5
VDD+0.5
V
Ambient Operating Temperature
0
70
°C
Soldering Temperature
Max of 10 seconds
260
°C
Storage temperature
-65
150
°C
DC CHARACTERISTICS (VDD = 3.3 V unless noted)
Operating Voltage, VDD
3.15
3.45
V
Output High Voltage, VOH
IOH=-12mA
2.4
V
Output Low Voltage, VOL
IOL=12mA
0.4
V
Output High Voltage, VOH, CMOS level
IOH=-4mA
VDD-0.4
V
Operating Supply Current, IDD
No Load
11
mA
Short Circuit Current
±50
mA
VIN, VCXO control voltage
0
3.3
V
AC CHARACTERISTICS (VDD = 3.3 V unless noted)
Input Crystal Frequency
13.50000
MHz
Output Clock Rise Time
0.8 to 2.0V
1.5
ns
Output Clock Fall Time
2.0 to 0.8V
1.5
ns
Output Clock Duty Cycle
At 1.4V
45
50
55
%
Maximum Absolute Jitter, short term
100
ps
Output pullability, note 2
0V
≤ VIN ≤ 3.3 V
±100
ppm
Electrical Specifications
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With an ICS approved pullable crystal. The MK3720A has a typical pull range of ±180 ppm.
External Components
The MK3720 requires a minimum number of external components for proper operation. A decoupling
capacitor of 0.01F should be connected between VDD and GND on pins 2 and 4, as close to the
MK3720 as possible. A series termination resistor of 33
may be used for the clock output. The input
crystal must be connected as close to the chip as possible. The input crystal should be a parallel mode,
pullable, AT cut, 13.5 MHz, with 14 pF load capacitance. Consult ICS for recommended suppliers.
IMPORTANT - read application note MAN05 before laying out the PCB.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK3720SLFTR | 54 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| MK3720S | 54 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| MK3720ALF | 54 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| MK3720ATRLF | 54 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| MK3720DLF | 54 MHz, OTHER CLOCK GENERATOR, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK3720STR | 制造商:ICS 制造商全稱:ICS 功能描述:27 MHz and 54 MHz 3.3 Volt VCXO |
| MK3721 | 制造商:ICS 制造商全稱:ICS 功能描述:Low Cost 3.3 Volt VCXO |
| MK3721D | 功能描述:IC VCXO DTV/SET-TOP 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| MK3721DLF | 功能描述:時鐘合成器/抖動清除器 LOW COST 16.2:28Mhz 3.3V VCXO RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK3721DLFTR | 功能描述:時鐘合成器/抖動清除器 LOW COST 16.2:28Mhz 3.3V VCXO RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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