參數(shù)資料
型號: MK30DN512ZVMB10R
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA81
封裝: 8 X 8 MM, MAPBGA-81
文件頁數(shù): 46/67頁
文件大?。?/td> 971K
代理商: MK30DN512ZVMB10R
DS3
DS4
DS1
DS2
DS7
DS8
First data
Last data
DS5
First data
Data
Last data
DS6
Data
DSPI_PCSn
DSPI_SCK
(CPOL=0)
DSPI_SIN
DSPI_SOUT
Figure 19. DSPI classic SPI timing — master mode
Table 37. Slave mode DSPI timing (low-speed mode)
Num
Description
Min.
Max.
Unit
Operating voltage
1.71
3.6
V
Frequency of operation
6.25
MHz
DS9
DSPI_SCK input cycle time
8 x tBUS
ns
DS10
DSPI_SCK input high/low time
(tSCK/2) - 4
(tSCK/2) + 4
ns
DS11
DSPI_SCK to DSPI_SOUT valid
20
ns
DS12
DSPI_SCK to DSPI_SOUT invalid
0
ns
DS13
DSPI_SIN to DSPI_SCK input setup
5
ns
DS14
DSPI_SCK to DSPI_SIN input hold
15
ns
DS15
DSPI_SS active to DSPI_SOUT driven
19
ns
DS16
DSPI_SS inactive to DSPI_SOUT not driven
19
ns
First data
Last data
First data
Data
Last data
Data
DS15
DS10
DS9
DS16
DS11
DS12
DS14
DS13
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
Figure 20. DSPI classic SPI timing — slave mode
Peripheral operating requirements and behaviors
K30 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
50
Preliminary
Freescale Semiconductor, Inc.
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