參數(shù)資料
型號(hào): MK2771-12STR
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 50 MHz, OTHER CLOCK GENERATOR, PDSO20
封裝: SOIC-20
文件頁(yè)數(shù): 1/4頁(yè)
文件大?。?/td> 69K
代理商: MK2771-12STR
MK2771-12
VCXO and Set-Top Clock Source
MDS 2771-12 A
1
Revision 061699
Printed 11/16/00
MicroClock Division of ICS 525 Race Street San Jose CA 95126(408)295-9800tel(408)295-9818fax
I C R O
C LOC K
Block Diagram
Description
Features
The MK2771-12 is a low cost, low jitter, high
performance VCXO and clock synthesizer
designed for set-top boxes. The on-chip Voltage
Controlled Crystal Oscillator accepts a 0 to 3V
input voltage to cause the output clocks to vary by
±100 ppm. Using MicroClock’s patented VCXO
and analog Phase-Locked Loop (PLL) techniques,
the device uses an inexpensive 13.5 MHz crystal
input to produce multiple output clocks including
a selectable processor clock, selectable UART and
audio clocks, a fixed 11.0592 MHz, and two low
skew copies of the 27 MHz. All clocks are
frequency locked to the 27.00 MHz output (and
to each other) with zero ppm error, so any output
can be used as the VCXO output.
This chip directly replaces the MK2771-02 when a
13.5 MHz input crystal is substituted for the
14.31818 MHz used on the -02. Additionally, the
-12 adds 24.576 MHz to the ACLK.
Packaged in 20 pin SOIC
Pin for pin and functional upgrade to MK2771-02
Uses an inexpensive 13.5 MHz crystal
On-chip patented VCXO with pull range
of 200 ppm
VCXO tuning voltage of 0 to 3 V
Processor frequency of 16.67 MHz, 20 MHz,
32 MHz, 40 MHz, or 50 MHz
Zero ppm synthesis error in all clocks (all exactly
track 27MHz VCXO) - patented
25 mA output drive capability at TTL levels
Advanced, low power, sub-micron CMOS process
5 V operating voltage
Voltage
Controlled
Crystal
Oscillator
VDD
GND
Clock
Synthesis
Circuitry
Output
Buffer
Output
Buffer
27.000 MHz
Output
Buffers
3.6864 MHz
or 18.432 MHz
Processor Clock
Output
Buffer
49.152 MHz
or 24.576 MHz
3
2
PCS1:0
13.5 MHz
pullable
crystal
X1
X2
2
VIN
Output
Buffer
11.0592 MHz
AVDD
÷ 2
13.500 MHz
Output
Buffer
UCS
ACS
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