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參數(shù)資料
| 型號(hào)： | MK2742-05STR |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 40.5 MHz, VIDEO CLOCK GENERATOR, PDSO16 |
| 封裝： | 0.150 INCH, SOIC-16 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 45K |
| 代理商： | MK2742-05STR |
MK2742
MPEG/Set-Top Clock Source
MDS2742D
3
Revision 10277
Printed 10/27/97
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
ICRO
CLOCK
Parameter
Conditions
Minimum
Typical
Maximum
Units
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Referenced to GND
7
V
Inputs and Clock Outputs
Referenced to GND
-0.5
VDD+0.5
V
Ambient Operating Temperature
0
70
°C
Soldering Temperature
Max of 20 seconds
260
°C
Storage temperature
-65
150
°C
DC CHARACTERISTICS (VDD = 5.0V unless noted)
Operating Voltage, VDD
4.5
5.5
V
Input High Voltage, VIH, X1/ICLK pin only
3.5
2.5
V
Input Low Voltage, VIL, X1/ICLK pin only
2.5
1.5
V
Input High Voltage, VIH
2
V
Input Low Voltage, VIL
0.8
V
Output High Voltage, VOH
IOH=-25mA
2.4
V
Output Low Voltage, VOL
IOL=25mA
0.4
V
Output High Voltage, VOH, CMOS level
IOH=-8mA
VDD-0.4
V
Operating Supply Current, IDD
No Load, note 2
37
mA
Short Circuit Current
Each output
±100
mA
Input Capacitance
7
pF
Frequency error, ACLK and 3.6864MHz clocks
-03, -04 versions
0
ppm
Frequency error, 24.576 MHz ACLK
-05, -06 versions
40
ppm
AC CHARACTERISTICS (VDD = 5.0V unless noted)
Input Frequency
27.000
MHz
Output Clock Rise Time
0.8 to 2.0V
1.5
ns
Output Clock Fall Time
2.0 to 0.8V
1.5
ns
Output Clock Duty Cycle
At VDD/2
40
60
%
Absolute Jitter, short term
Variation from mean
200
ps
Electrical Specifications
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With Processor clock at 55MHz, and ACLK at 16.93MHz.
External Components
The MK2742 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.1F should be connected between VDD and GND, as close to the MK2742 as possible. A
series termination resistor of 33
may be used for each clock output. If a clock input is not used, the
27.00 MHz crystal must be connected as close to the chip as possible. The crystal should be a fundamental
mode, parallel resonant, 50 ppm or better. Crystal capacitors should be connected from pins X1 to ground
and X2 to ground. The value of these capacitors is given by the following equation, where CL is the crystal
load capacitance: Crystal caps (pF) = (CL-4) x 2. So for a crystal with 16pF load capacitance, two 24pF caps
should be used.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK2743S | 制造商:MicroClock 功能描述:66 MHz, VIDEO CLOCK GENERATOR, PDSO16 |
| MK2745-21 | 制造商:ICS 制造商全稱:ICS 功能描述:DVD/MPEG Clock Source |
| MK2745-21S | 功能描述:IC CLK SOURCE DVD/MPEG 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MK2745-21SLF | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 DVD/MPEG CLOCK SOURCE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK2745-21SLFTR | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 DVD/MPEG CLOCK SOURCE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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