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參數(shù)資料
| 型號： | MK2704S |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 36.864 MHz, VIDEO CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, SOIC-8 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 171K |
| 代理商： | MK2704S |
MK2704
PLL AUDIO CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
IDT / ICS PLL AUDIO CLOCK SYNTHESIZER
2
MK2704
REV C 021304
Pin Assignment
8-pin (150 mil) SOIC
AUDIO CLOCK OUTPUT SELECT TABLE
Key: 0 = Connect pin directly to ground
1 = Connect pin directly to VDD
Pin Descriptions
External Components
Decoupling Capacitor
As with any high performance mixed-signal IC, the MK2704
must be isolated from system power supply noise to perform
optimally.
A decoupling capacitor of 0.01F must be connected
between VDD and GND on pins 2 and 3. It must be
connected close to the MK2704 to minimize lead
inductance. No external power supply filtering is required for
the MK2704.
Series Termination Resistor
A 33
terminating resistor can be used next to the clock
outputs for trace lengths over one inch.
Crystal Load Capacitors
The total on-chip capacitance is approximately 16 pF. A
parallel resonant, fundamental mode, AT cut 27 MHz crystal
should be used. The device crystal connections should
include pads for small capacitors from X1 to ground and
from X2 to ground. These capacitors are used to adjust the
X1
VDD
GND
S0
27M
S1
CLK
X2
1
2
3
4
8
7
6
5
S1
S0
CLK (MHz)
0
36.864
01
Test
1
0
16.9344
1
18.432
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X1
XI
Crystal Connection. Connect to a 27 MHz fundamental crystal or clock.
2
VDD
Power
Connect to +3.3 V or +5 V.
3
GND
Power
Connect to ground.
4
27M
Output
27.00 MHz buffered reference clock output.
5
CLK
Output
Audio clock output per table above.
6
S1
Input
Audio clock frequency select input #1. Determines CLK output per table
above. Internal pull-up resistor.
7
S0
Input
Audio clock frequency select input #0. Determines CLK output per table
above. Internal pull-up resistor.
8
X2
XO
Crystal connection to a 27 MHz crystal, or leave unconnected for clock
output.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK2705S | 24.576 MHz, VIDEO CLOCK GENERATOR, PDSO8 |
| MK2716S | 74.25 MHz, VIDEO CLOCK GENERATOR, PDSO8 |
| MK2727SLF | 27 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| MK2732-06GLF | 54 MHz, VIDEO CLOCK GENERATOR, PDSO16 |
| MK2771-15RLF | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK2704SLF | 功能描述:時鐘合成器/抖動清除器 PLL AUDIO CLOCK SYNTHESIZER RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK2704SLFTR | 功能描述:時鐘合成器/抖動清除器 PLL AUDIO CLOCK SYNTHESIZER RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK2704STR | 功能描述:IC PLL AUD CLK SYNTHESIZER 8SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MK2705 | 制造商:ICS 制造商全稱:ICS 功能描述:Audio Clock Source |
| MK2705S | 功能描述:IC AUDIO CLOCK SOURCE 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
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