參數(shù)資料
型號: MK2302S-01LF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 2302 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封裝: 0.150 INCH, ROHS COMPLIANT, SOIC-8
文件頁數(shù): 1/7頁
文件大?。?/td> 183K
代理商: MK2302S-01LF
DATASHEET
MULTIPLIER AND ZERO DELAY BUFFER
MK2302-01
IDT MULTIPLIER AND ZERO DELAY BUFFER
1
MK2302-01
REV G 051310
Description
The MK2302-01 is a high performance Zero Delay Buffer
(ZDB) which integrates IDT’s proprietary analog/digital
Phase Locked Loop (PLL) techniques. The chip is part of
IDT’s ClockBlocksTM family and was designed as a
performance upgrade to meet today’s higher speed and
lower voltage requirements. The zero delay feature means
that the rising edge of the input clock aligns with the rising
edges of both output clocks, giving the appearance of no
delay through the device. There are two outputs on the chip,
one being a low-skew divide by two of the other output.
The MK2302-01 is ideal for synchronizing outputs in a large
variety of systems, from personal computers to data
communications to graphics/video. By allowing off-chip
feedback paths, the device can eliminate the delay through
other devices.
Features
8-pin SOIC package
Pb (lead) free package
Low input to output skew of 250 ps max
Absolute jitter ± 500 ps
Propagation Delay ± 350 ps
Ability to choose between different multipliers from 0.5X
to 16X
Output clock frequency up to 168 MHz at 3.3 V
Can recover degraded input clock duty cycle
Output clock duty cycle of 45/55
Full CMOS clock swings with 25mA drive capability at
TTL levels
Advanced, low power CMOS process
Operating voltage of 3.3 V or 5 V
Industrial temperature version available
Block Diagram
Ph a s e
De te c to r,
C h arge
Pu m p ,
an d Lo op
F ilte r
div ide
by N
CL K 1
E xte rn al fe ed ba ck ca n c o m e from C L K 1 o r C L K 2 (se e ta b le on p a g e 2)
IC L K
FBIN
S1 :0
VC O
CL K 2
/2
相關PDF資料
PDF描述
MK2304-1ILFT 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MK2304-1IT 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MK2304S-1T 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MK2304S-2ILFTR 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MK2304S-2LF 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
相關代理商/技術參數(shù)
參數(shù)描述
MK2302S-01LFTR 功能描述:IC MULTIPLIER/ZD BUFFER 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML,PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤,16-MLF? 供應商設備封裝:16-MLF?(3x3) 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND
MK2302S-01TR 功能描述:IC MULTIPLIER ZD BUFFER 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:*
MK2302SI-01 功能描述:時鐘緩沖器 MULTIPLIER AND ZERO DELAY BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲(最大值): 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
MK2302SI-01TR 功能描述:IC MULTIPLIER ZD BUFFER 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器,PLL,頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS,LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP(7x7) 包裝:帶卷 (TR)
MK2304-2 制造商:ICS 制造商全稱:ICS 功能描述:ZERO DELAY, LOW SKEW BUFFER