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參數(shù)資料
| 型號(hào)： | MK2302S-01 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Multiplier and Zero Delay Buffer |
| 中文描述： | 乘數(shù)和零延遲緩沖器 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 161K |
| 代理商： | MK2302S-01 |
MK2302S-01
MDS 2302S-01 B
1
Revision 070803
Integrated Circuit Systems, Inc.
●
525 Race Street, San Jose, CA 95126
●
tel (408) 295-9800
●
www.icst.com
Multiplier and Zero Delay Buffer
Description
The MK2302S-01is a high performance Zero Delay
Buffer (ZDB) which integrates ICS’ proprietary
analog/digital Phase Locked Loop (PLL) techniques.
The chip is part of ICS’ ClockBlocks
TM
family and was
designed as a performance upgrade to meet today’s
higher speed and lower voltage requirements. The zero
delay feature means that the rising edge of the input
clock aligns with the rising edges of both output clocks,
giving the appearance of no delay through the device.
There are two outputs on the chip, one being a
low-skew divide by two of the other output.
The MK2302S-01 is ideal for synchronizing outputs in a
large variety of systems, from personal computers to
data communications to graphics/video. By allowing
off-chip feedback paths, the device can eliminate the
delay through other devices.
Features
8 pin SOIC package
Low input to output skew of 250ps max
Absolute jitter ± 500ps
Propagation Delay ± 350ps
Ability to choose between different multipliers from
0.5X to 16X
Output clock frequency up to 133 MHz at 3.3V
Can recover degraded input clock duty cycle
Output clock duty cycle of 45/55
Full CMOS clock swings with 25mA drive capability
at TTL levels
Advanced, low power CMOS process
Operating voltage of 3.3V or 5V
Industrial temperature version available
Block Diagram
Phase
Detector,
Charge
Pump,
and Loop
Filter
divide
by N
CLK1
External feedback can come from CLK1 or CLK2 (see table on page 2)
ICLK
FBIN
S1:0
VCO
CLK2
/2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK3880P-20 | Z80 PROCESSOR Central Processing Unit |
| MK3880 | Z80 PROCESSOR Central Processing Unit |
| MK3880N | Z80 PROCESSOR Central Processing Unit |
| MK3880N-4 | Z80 PROCESSOR Central Processing Unit |
| MK3880P | Z80 PROCESSOR Central Processing Unit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK2302S-01ILF | 功能描述:時(shí)鐘緩沖器 MULTIPLIER AND ZERO DELAY BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| MK2302S-01ILFTR | 功能描述:時(shí)鐘緩沖器 MULTIPLIER AND ZERO DELAY BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| MK2302S-01LF | 功能描述:時(shí)鐘緩沖器 MULTIPLIER AND ZERO DELAY BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| MK2302S-01LFTR | 功能描述:IC MULTIPLIER/ZD BUFFER 8-SOIC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時(shí)鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| MK2302S-01TR | 功能描述:IC MULTIPLIER ZD BUFFER 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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